| /qemu/hw/misc/ |
| H A D | imx7_ccm.c | 93 const uint32_t *mmio = opaque; in imx7_set_clr_tog_read() local
95 return mmio[CCM_INDEX(offset)]; in imx7_set_clr_tog_read()
103 uint32_t *mmio = opaque; in imx7_set_clr_tog_write() local
107 mmio[index] = value; in imx7_set_clr_tog_write()
110 mmio[index] |= value; in imx7_set_clr_tog_write()
113 mmio[index] &= ~value; in imx7_set_clr_tog_write()
116 mmio[index] ^= value; in imx7_set_clr_tog_write()
176 memory_region_init(&s->mmio.container, obj, TYPE_IMX7_ANALOG, in imx7_analog_init()
179 memory_region_init_io(&s->mmio.analog, in imx7_analog_init()
186 memory_region_add_subregion(&s->mmio.container, in imx7_analog_init()
[all …]
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| H A D | imx8mp_ccm.c | 41 const uint32_t *mmio = opaque; in imx8mp_set_clr_tog_read() local
43 return mmio[CCM_INDEX(offset)]; in imx8mp_set_clr_tog_read()
51 uint32_t *mmio = opaque; in imx8mp_set_clr_tog_write() local
55 mmio[index] = value; in imx8mp_set_clr_tog_write()
58 mmio[index] |= value; in imx8mp_set_clr_tog_write()
61 mmio[index] &= ~value; in imx8mp_set_clr_tog_write()
64 mmio[index] ^= value; in imx8mp_set_clr_tog_write()
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| H A D | auxbus.c | 90 memory_region_add_subregion(bus->aux_io, addr, aux_dev->mmio); in aux_map_slave()
304 object_property_get_uint(OBJECT(s->mmio), "addr", NULL), in aux_slave_dev_print()
305 memory_region_size(s->mmio)); in aux_slave_dev_print()
308 void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio) in aux_init_mmio() argument
310 assert(!aux_slave->mmio); in aux_init_mmio()
311 aux_slave->mmio = mmio; in aux_init_mmio()
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| H A D | imx8mp_analog.c | 122 memory_region_init(&s->mmio.container, obj, TYPE_IMX8MP_ANALOG, 0x10000); in imx8mp_analog_init()
124 memory_region_init_io(&s->mmio.analog, obj, &imx8mp_analog_ops, s, in imx8mp_analog_init()
126 memory_region_add_subregion(&s->mmio.container, 0, &s->mmio.analog); in imx8mp_analog_init()
128 sysbus_init_mmio(sd, &s->mmio.container); in imx8mp_analog_init()
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| H A D | sifive_test.c | 75 memory_region_init_io(&s->mmio, obj, &sifive_test_ops, s, in sifive_test_init()
77 sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); in sifive_test_init()
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| H A D | imx7_gpr.c | 100 memory_region_init_io(&s->mmio, obj, &imx7_gpr_ops, s, in imx7_gpr_init()
102 sysbus_init_mmio(sd, &s->mmio); in imx7_gpr_init()
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| /qemu/hw/core/ |
| H A D | sysbus.c | 127 if (dev->mmio[n].addr == addr) { in sysbus_mmio_map_common()
131 if (dev->mmio[n].addr != (hwaddr)-1) { in sysbus_mmio_map_common()
133 memory_region_del_subregion(get_system_memory(), dev->mmio[n].memory); in sysbus_mmio_map_common()
135 dev->mmio[n].addr = addr; in sysbus_mmio_map_common()
139 dev->mmio[n].memory, in sysbus_mmio_map_common()
145 dev->mmio[n].memory); in sysbus_mmio_map_common()
178 dev->mmio[n].addr = -1; in sysbus_init_mmio()
179 dev->mmio[n].memory = memory; in sysbus_init_mmio()
185 return dev->mmio[n].memory; in sysbus_mmio_get_region()
253 size = memory_region_size(s->mmio[i].memory); in sysbus_dev_print()
[all …]
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| H A D | platform-bus.c | 57 MemoryRegion *pbus_mr = &pbus->mmio; in platform_bus_get_mmio_addr()
148 MemoryRegion *mr = memory_region_find(&pbus->mmio, off, size).mr; in platform_bus_map_mmio()
164 memory_region_add_subregion(&pbus->mmio, off, sbdev_mr); in platform_bus_map_mmio()
193 memory_region_init(&pbus->mmio, OBJECT(dev), "platform bus", in platform_bus_realize()
195 sysbus_init_mmio(d, &pbus->mmio); in platform_bus_realize()
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| /qemu/hw/display/ |
| H A D | vga-pci.c | 52 MemoryRegion mmio; member
257 memory_region_init_io(&d->mmio, OBJECT(dev), &unassigned_io_ops, NULL, in pci_std_vga_realize()
267 pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, in pci_std_vga_realize()
270 pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); in pci_std_vga_realize()
288 memory_region_init_io(&d->mmio, OBJECT(dev), &unassigned_io_ops, NULL, in pci_secondary_vga_realize()
298 pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext, edid); in pci_secondary_vga_realize()
301 pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); in pci_secondary_vga_realize()
310 memory_region_del_subregion(&d->mmio, &d->mrs[0]); in pci_secondary_vga_exit()
311 memory_region_del_subregion(&d->mmio, &d->mrs[1]); in pci_secondary_vga_exit()
313 memory_region_del_subregion(&d->mmio, &d->mrs[2]); in pci_secondary_vga_exit()
[all …]
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| H A D | bochs-display.c | 40 MemoryRegion mmio; member
289 memory_region_init_io(&s->mmio, obj, &unassigned_io_ops, NULL, in bochs_display_realize()
291 memory_region_add_subregion(&s->mmio, PCI_VGA_BOCHS_OFFSET, &s->vbe); in bochs_display_realize()
292 memory_region_add_subregion(&s->mmio, PCI_VGA_QEXT_OFFSET, &s->qext); in bochs_display_realize()
296 pci_register_bar(&s->pci, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio); in bochs_display_realize()
301 memory_region_add_subregion(&s->mmio, 0, &s->edid); in bochs_display_realize()
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| /qemu/hw/ide/ |
| H A D | sii3112.c | 34 MemoryRegion mmio; member
262 memory_region_init_io(&d->mmio, OBJECT(d), &sii3112_reg_ops, d, in sii3112_pci_realize()
264 pci_register_bar(dev, 5, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); in sii3112_pci_realize()
268 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar0", &d->mmio, 0x80, 8); in sii3112_pci_realize()
271 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar1", &d->mmio, 0x88, 4); in sii3112_pci_realize()
274 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar2", &d->mmio, 0xc0, 8); in sii3112_pci_realize()
277 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar3", &d->mmio, 0xc8, 4); in sii3112_pci_realize()
280 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar4", &d->mmio, 0, 16); in sii3112_pci_realize()
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| /qemu/hw/pci/ |
| H A D | pcie_host.c | 81 memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, "pcie-mmcfg-mmio", in pcie_host_init()
88 memory_region_del_subregion(get_system_memory(), &e->mmio); in pcie_host_mmcfg_unmap()
99 memory_region_set_size(&e->mmio, e->size); in pcie_host_mmcfg_init()
107 memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio); in pcie_host_mmcfg_map()
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| /qemu/hw/pci-host/ |
| H A D | xilinx-pcie.c | 124 memory_region_init(&s->mmio, OBJECT(s), "mmio", UINT64_MAX); in xilinx_pcie_host_realize()
125 memory_region_set_enabled(&s->mmio, false); in xilinx_pcie_host_realize()
133 sysbus_init_mmio(sbd, &pex->mmio); in xilinx_pcie_host_realize()
134 sysbus_init_mmio(sbd, &s->mmio); in xilinx_pcie_host_realize()
137 pci_swizzle_map_irq_fn, s, &s->mmio, in xilinx_pcie_host_realize()
250 memory_region_set_enabled(&s->mmio, val & ROOTCFG_RPSCR_BRIDGEEN); in xilinx_pcie_root_config_write()
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| /qemu/hw/mem/ |
| H A D | sparse-mem.c | 28 MemoryRegion mmio; member
116 return &SPARSE_MEM(dev)->mmio; in sparse_mem_init()
134 memory_region_init_io(&s->mmio, OBJECT(s), &sparse_mem_ops, s, in sparse_mem_realize()
136 sysbus_init_mmio(sbd, &s->mmio); in sparse_mem_realize()
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| H A D | npcm7xx_mc.c | 63 memory_region_init_io(&s->mmio, OBJECT(s), &npcm7xx_mc_ops, s, "regs", in npcm7xx_mc_realize()
65 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->mmio); in npcm7xx_mc_realize()
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| /qemu/docs/system/i386/ |
| H A D | xenpvh.rst | 48 …20832,pci-ecam-size=268435456,pci-mmio-base=4026531840,pci-mmio-size=33554432,pci-mmio-high-base=8…
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| /qemu/hw/usb/ |
| H A D | hcd-dwc2.c | 705 uint32_t *mmio; in dwc2_glbreg_write() local
715 mmio = &s->glbreg[index]; in dwc2_glbreg_write()
716 old = *mmio; in dwc2_glbreg_write()
792 *mmio = val; in dwc2_glbreg_write()
822 uint32_t *mmio; in dwc2_fszreg_write() local
831 mmio = &s->fszreg[index]; in dwc2_fszreg_write()
832 old = *mmio; in dwc2_fszreg_write()
835 *mmio = val; in dwc2_fszreg_write()
878 uint32_t *mmio; in dwc2_hreg0_write() local
889 mmio = &s->hreg0[index]; in dwc2_hreg0_write()
[all …]
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| /qemu/hw/i386/xen/ |
| H A D | xen_pvdevice.c | 53 MemoryRegion mmio; member
111 memory_region_init_io(&d->mmio, NULL, &xen_pv_mmio_ops, d, in xen_pv_realize()
115 &d->mmio); in xen_pv_realize()
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| /qemu/include/hw/adc/ |
| H A D | aspeed_adc.h | 34 MemoryRegion mmio; member
45 MemoryRegion mmio; member
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| /qemu/hw/adc/ |
| H A D | aspeed_adc.c | 273 memory_region_init_io(&s->mmio, OBJECT(s), &aspeed_adc_engine_ops, s, name, in aspeed_adc_engine_realize()
276 sysbus_init_mmio(sbd, &s->mmio); in aspeed_adc_engine_realize()
353 memory_region_init(&s->mmio, OBJECT(s), TYPE_ASPEED_ADC, in aspeed_adc_realize()
356 sysbus_init_mmio(sbd, &s->mmio); in aspeed_adc_realize()
366 memory_region_add_subregion(&s->mmio, in aspeed_adc_realize()
368 &s->engines[i].mmio); in aspeed_adc_realize()
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| /qemu/hw/ppc/ |
| H A D | pnv_bmc.c | 162 result = memory_region_dispatch_write(&pnor->mmio, offset + i * 4, in hiomap_erase()
216 memory_region_set_readonly(&pnor->mmio, readonly); in hiomap_cmd()
217 memory_region_set_enabled(&pnor->mmio, true); in hiomap_cmd()
228 memory_region_set_enabled(&pnor->mmio, false); in hiomap_cmd()
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| /qemu/include/hw/intc/ |
| H A D | riscv_aclint.h | 39 MemoryRegion mmio; member
64 MemoryRegion mmio; member
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| /qemu/include/hw/misc/ |
| H A D | auxbus.h | 84 MemoryRegion *mmio; member
133 void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio);
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| /qemu/hw/i386/ |
| H A D | microvm-dt.c | 63 static void dt_add_virtio(MicrovmMachineState *mms, VirtIOMMIOProxy *mmio) in dt_add_virtio() argument
65 SysBusDevice *dev = SYS_BUS_DEVICE(mmio); in dt_add_virtio()
66 VirtioBusState *mmio_virtio_bus = &mmio->bus; in dt_add_virtio()
74 hwaddr base = dev->mmio[0].addr; in dt_add_virtio()
153 hwaddr base = dev->mmio[0].addr; in dt_add_ioapic()
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| /qemu/hw/intc/ |
| H A D | xilinx_intc.c | 58 MemoryRegion mmio; member
193 sysbus_init_mmio(SYS_BUS_DEVICE(obj), &p->mmio); in xilinx_intc_init()
206 memory_region_init_io(&p->mmio, OBJECT(dev), in xilinx_intc_realize()
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