Home
last modified time | relevance | path

Searched refs:medeleg (Results 1 – 4 of 4) sorted by relevance

/qemu/target/riscv/
H A Dmachine.c438 VMSTATE_UINTTL(env.medeleg, RISCVCPU),
H A Dcpu.h302 target_ulong medeleg; member
H A Dcsr.c2179 *val = env->medeleg; in read_medeleg()
2186 env->medeleg = (env->medeleg & ~DELEGABLE_EXCPS) | (val & DELEGABLE_EXCPS); in write_medeleg()
H A Dcpu_helper.c2169 uint64_t deleg = async ? env->mideleg : env->medeleg; in riscv_cpu_do_interrupt()