Searched refs:mcyclecfgh (Results 1 – 2 of 2) sorted by relevance
407 target_ulong mcyclecfgh; member
1086 *val = env->mcyclecfgh; in read_mcyclecfgh()1104 env->mcyclecfgh = val & inh_avail_mask; in write_mcyclecfgh()1244 cfg_val = upper_half ? ((uint64_t)env->mcyclecfgh << 32) : in riscv_pmu_ctr_get_fixed_counters_val()1570 env->mcyclecfgh = (new_val & wr_mask) | in rmw_cd_ctr_cfgh()1571 (env->mcyclecfgh & ~wr_mask); in rmw_cd_ctr_cfgh()1573 *val = env->mcyclecfgh; in rmw_cd_ctr_cfgh()