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Searched refs:mcr (Results 1 – 9 of 9) sorted by relevance

/qemu/tests/tcg/arm/system/
H A Dboot.S47 mcr p15, 0, r0, c12, c0, 0 /* Set up VBAR */
148 mcr p15, 0, r0, c3, c0, 0
157 mcr p15, 0, r0, c1, c0, 2
168 mcr p15, 0, r0, c2, c0, 0
184 mcr p15, 0, r0, c1, c0, 0
/qemu/hw/char/
H A Dserial.c255 if (s->mcr & UART_MCR_LOOP) { in serial_xmit()
322 if (s->mcr & UART_MCR_RTS) { in serial_update_tiocm()
325 if (s->mcr & UART_MCR_DTR) { in serial_update_tiocm()
446 int old_mcr = s->mcr; in serial_ioport_write()
447 s->mcr = val & 0x1f; in serial_ioport_write()
451 if (s->poll_msl >= 0 && old_mcr != s->mcr) { in serial_ioport_write()
495 if (!(s->mcr & UART_MCR_LOOP)) { in serial_ioport_read()
519 ret = s->mcr; in serial_ioport_read()
530 if (s->mcr & UART_MCR_LOOP) { in serial_ioport_read()
533 ret = (s->mcr & 0x0c) << 4; in serial_ioport_read()
[all …]
/qemu/hw/gpio/
H A Dzaurus.c44 uint16_t mcr; member
85 return s->mcr; in scoop_read()
122 s->mcr = value; in scoop_write()
235 VMSTATE_UINT16(mcr, ScoopInfo),
/qemu/include/hw/char/
H A Dserial.h46 uint8_t mcr; member
/qemu/target/arm/tcg/
H A Da32.decode50 &mcr cp opc1 crn crm opc2 rt
546 @mcr ---- .... opc1:3 . crn:4 rt:4 cp:4 opc2:3 . crm:4 &mcr
552 MCR .... 1110 ... 0 .... .... .... ... 1 .... @mcr
553 MRC .... 1110 ... 1 .... .... .... ... 1 .... @mcr
H A Dt32.decode48 &mcr !extern cp opc1 crn crm opc2 rt
707 @mcr .... .... opc1:3 . crn:4 rt:4 cp:4 opc2:3 . crm:4
713 MCR 1110 1110 ... 0 .... .... .... ... 1 .... @mcr
714 MRC 1110 1110 ... 1 .... .... .... ... 1 .... @mcr
/qemu/hw/arm/
H A Dstellaris.c510 uint32_t mcr; member
543 return s->mcr; in stellaris_i2c_read()
569 if ((s->mcr & 0x10) == 0) { in stellaris_i2c_write()
629 s->mcr = value & 0x31; in stellaris_i2c_write()
656 s->mcr = 0; in stellaris_i2c_reset_hold()
683 VMSTATE_UINT32(mcr, stellaris_i2c_state),
H A Domap1.c2914 uint16_t mcr[2]; member
3167 return s->mcr[1]; in omap_mcbsp_read()
3169 return s->mcr[0]; in omap_mcbsp_read()
3285 s->mcr[1] = value & 0x03e3; in omap_mcbsp_writeh()
3293 s->mcr[0] = value & 0x03e1; in omap_mcbsp_writeh()
3416 memset(&s->mcr, 0, sizeof(s->mcr)); in omap_mcbsp_reset()
/qemu/hw/net/
H A Dxilinx_axienet.c341 uint32_t mcr; member
594 s->mii.mcr = value; in enet_write()