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Searched refs:m0 (Results 1 – 25 of 25) sorted by relevance

/qemu/tests/tcg/xtensa/
H A Dtest_mac16.S59 test_mulxx mul.dd, 3, m0, m3, 0xf7315a5a, 0xa5a5137f
105 test_mulxxx mula.dd, 3, m0, m3, 0xf7315a5a, 0xa5a5137f, 0x0ff73155aa, +
122 test_mulxxx muls.dd, 3, m0, m3, 0xf7315a5a, 0xa5a5137f, 0xfff73155aa, -
127 ldinc m0, a2
130 rsr a3, m0
H A Dtest_sr.S175 test_sr m0, 1
/qemu/target/arm/tcg/
H A Dneon_helper.c1242 uint64_t m0 = ELEM(zd0, 1, 8) | (ELEM(zd0, 3, 8) << 8) in HELPER() local
1251 rm[0] = m0; in HELPER()
1267 uint64_t m0 = ELEM(zd0, 1, 16) | (ELEM(zd0, 3, 16) << 16) in HELPER() local
1272 rm[0] = m0; in HELPER()
1286 uint64_t m0 = ELEM(zd0, 1, 32) | (ELEM(zd1, 1, 32) << 32); in HELPER() local
1289 rm[0] = m0; in HELPER()
1304 uint64_t m0 = ELEM(zd, 1, 8) | (ELEM(zd, 3, 8) << 8) in HELPER() local
1309 rm[0] = m0; in HELPER()
1320 uint64_t m0 = ELEM(zd, 1, 16) | (ELEM(zd, 3, 16) << 16) in HELPER() local
1323 rm[0] = m0; in HELPER()
[all …]
H A Dsve_helper.c676 TYPE m0 = *(TYPE *)(vm + H(i)); \ in DO_ZPZZ()
684 *(TYPE *)(vd + H(i)) = OP(m0, m1); \ in DO_ZPZZ()
700 TYPE m0 = m[i], m1 = m[i + 1]; \
705 d[i + 1] = OP(m0, m1); \
747 TYPE m0 = *(TYPE *)(vm + H(i)); \
755 *(TYPE *)(vd + H(i)) = OP(m0, m1, status); \
7370 static inline bool do_match2(uint64_t n, uint64_t m0, uint64_t m1, int esz) in do_match2() argument
7378 cmp0 = cmp1 ^ m0; in do_match2()
7394 uint64_t m0 = *(uint64_t *)(vm + i); in do_match() local
7404 bool o = do_match2(n >> (k * 8), m0, m1, esz); in do_match()
[all …]
H A Dmve_helper.c1966 int64_t m0 = m[H##ESIZE(e)]; \ in DO_VMAXMINV_S()
1967 uint32_t r = n0 >= m0 ? (n0 - m0) : (m0 - n0); \ in DO_VMAXMINV_S()
H A Dvec_helper.c852 TYPED m0 = m_indexed[i * 4 + 0]; \ in DO_DOT()
858 n[i * 4 + 0] * m0 + \ in DO_DOT()
/qemu/include/fpu/
H A Dsoftfloat-macros.h541 uint64_t m0, m1, m2, n1, n2; in mul128To256() local
548 add192( 0, m1, m2, 0, n1, n2, &m0, &m1, &m2); in mul128To256()
549 add192(m0, m1, m2, z0, z1, z2, z0Ptr, z1Ptr, z2Ptr); in mul128To256()
/qemu/linux-user/hexagon/
H A Dsignal.c39 target_ulong m0; member
115 __put_user(env->gpr[HEX_REG_M0], &sc->m0); in setup_sigcontext()
231 __get_user(env->gpr[HEX_REG_M0], &sc->m0); in restore_sigcontext()
/qemu/tests/tcg/arm/system/
H A Dtest-armv6m-undef.S24 .cpu cortex-m0
/qemu/tests/tcg/arm/
H A DMakefile.softmmu-target14 $(CC) -mcpu=cortex-m0 -mfloat-abi=soft \
/qemu/docs/
H A DCOLO-FT.txt171 -object filter-mirror,id=m0,netdev=hn0,queue=tx,outdev=mirror0 \
257 {"execute": "object-del", "arguments":{ "id": "m0" } }
293 {"execute": "object-add", "arguments":{ "qom-type": "filter-mirror", "id": "m0", "netdev": "hn0", "…
322 {"execute": "object-add", "arguments":{ "qom-type": "filter-mirror", "id": "m0", "insert": "before"…
H A Dcolo-proxy.txt174 -object filter-mirror,id=m0,netdev=hn0,queue=tx,outdev=mirror0
199 -object filter-mirror,id=m0,netdev=hn0,queue=tx,outdev=mirror0,vnet_hdr_support
/qemu/target/xtensa/core-dc232b/
H A Dgdb-config.c.inc116 XTREG(47, 188, 32, 4, 4, 0x0220, 0x0006, -1, 2, 0x1100, m0,
H A Dxtensa-modules.c.inc11630 { "rsr.m0", 190 /* xt_iclass_rsr.m0 */,
11633 { "wsr.m0", 191 /* xt_iclass_wsr.m0 */,
11636 { "xsr.m0", 192 /* xt_iclass_xsr.m0 */,
12344 return 294; /* xsr.m0 */
12536 return 292; /* rsr.m0 */
12673 return 293; /* wsr.m0 */
/qemu/disas/
H A Dhppa.c1908 int m15, m0, m1; in extract_16() local
1910 m0 = GET_BIT (word, 16); in extract_16()
1914 word = word | (m15 << 15) | ((m15 ^ m0) << 14) | ((m15 ^ m1) << 13); in extract_16()
/qemu/target/xtensa/core-dc233c/
H A Dgdb-config.c.inc72 XTREG(47, 188, 32, 4, 4, 0x0220, 0x0006, -1, 2, 0x1100, m0, 0, 0, 0, 0, 0, 0)
H A Dxtensa-modules.c.inc12278 { "rsr.m0", ICLASS_xt_iclass_rsr_m0,
12281 { "wsr.m0", ICLASS_xt_iclass_wsr_m0,
12284 { "xsr.m0", ICLASS_xt_iclass_xsr_m0,
/qemu/target/xtensa/core-de212/
H A Dgdb-config.c.inc69 XTREG( 45,180,32, 4, 4,0x0220,0x0006,-1, 2,0x1100,m0, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc11647 { "rsr.m0", ICLASS_xt_iclass_rsr_m0,
11650 { "wsr.m0", ICLASS_xt_iclass_wsr_m0,
11653 { "xsr.m0", ICLASS_xt_iclass_xsr_m0,
/qemu/target/xtensa/core-test_kc705_be/
H A Dgdb-config.c.inc71 XTREG( 48,192,32, 4, 4,0x0220,0x0006,-1, 2,0x1100,m0, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc33797 { "rsr.m0", ICLASS_xt_iclass_rsr_m0,
33800 { "wsr.m0", ICLASS_xt_iclass_wsr_m0,
33803 { "xsr.m0", ICLASS_xt_iclass_xsr_m0,
/qemu/target/xtensa/core-de233_fpu/
H A Dgdb-config.c.inc70 XTREG( 47,188,32, 4, 4,0x0220,0x0006,-1, 2,0x1100,m0, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc16906 { "rsr.m0", ICLASS_xt_iclass_rsr_m0,
16909 { "wsr.m0", ICLASS_xt_iclass_wsr_m0,
16912 { "xsr.m0", ICLASS_xt_iclass_xsr_m0,
/qemu/target/loongarch/tcg/
H A Dvec_helper.c3114 static inline bool do_match2(uint64_t n, uint64_t m0, uint64_t m1, int esz) in do_match2() argument
3122 cmp0 = cmp1 ^ m0; in do_match2()
/qemu/
H A Dqemu-options.hx515 -object memory-backend-ram,size=1G,id=m0 \
517 -numa node,nodeid=0,memdev=m0 \
585 -object memory-backend-ram,size=1G,id=m0 \
588 -numa node,nodeid=0,memdev=m0 \
5782 -object filter-mirror,id=m0,netdev=hn0,queue=tx,outdev=mirror0
5808 -object filter-mirror,id=m0,netdev=hn0,queue=tx,outdev=mirror0