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Searched refs:ldl_le_p (Results 1 – 25 of 44) sorted by relevance

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/qemu/hw/virtio/
H A Dvirtio-crypto.c81 info->cipher_alg = ldl_le_p(&cipher_para->algo); in virtio_crypto_cipher_session_helper()
82 info->key_len = ldl_le_p(&cipher_para->keylen); in virtio_crypto_cipher_session_helper()
83 info->direction = ldl_le_p(&cipher_para->op); in virtio_crypto_cipher_session_helper()
124 op_type = ldl_le_p(&sess_req->op_type); in virtio_crypto_create_sym_session()
147 sym_info->alg_chain_order = ldl_le_p( in virtio_crypto_create_sym_session()
149 sym_info->add_len = ldl_le_p(&sess_req->u.chain.para.aad_len); in virtio_crypto_create_sym_session()
150 sym_info->hash_mode = ldl_le_p(&sess_req->u.chain.para.hash_mode); in virtio_crypto_create_sym_session()
153 ldl_le_p(&sess_req->u.chain.para.u.mac_param.algo); in virtio_crypto_create_sym_session()
154 sym_info->auth_key_len = ldl_le_p( in virtio_crypto_create_sym_session()
156 sym_info->hash_result_len = ldl_le_p( in virtio_crypto_create_sym_session()
[all …]
H A Dvirtio-config-io.c150 val = ldl_le_p(vdev->config + addr); in virtio_config_modern_readl()
/qemu/target/hexagon/
H A Dgdbstub.c55 uint32_t p3_0 = ldl_le_p(mem_buf); in hexagon_gdb_write_register()
63 env->gpr[n] = ldl_le_p(mem_buf); in hexagon_gdb_write_register()
70 env->pred[n] = ldl_le_p(mem_buf) & 0xff; in hexagon_gdb_write_register()
120 env->VRegs[n].uw[i] = ldl_le_p(mem_buf); in gdb_put_vreg()
130 env->QRegs[n].uw[i] = ldl_le_p(mem_buf); in gdb_put_qreg()
/qemu/hw/cxl/
H A Dcxl-host.c108 cap = ldl_le_p(cache_mem + R_CXL_HDM_DECODER_CAPABILITY); in cxl_hdm_find_target()
117 low = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_BASE_LO + i * hdm_inc); in cxl_hdm_find_target()
118 high = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_BASE_HI + i * hdm_inc); in cxl_hdm_find_target()
120 low = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_SIZE_LO + i * hdm_inc); in cxl_hdm_find_target()
121 high = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_SIZE_HI + i * hdm_inc); in cxl_hdm_find_target()
127 ctrl = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_CTRL + i * hdm_inc); in cxl_hdm_find_target()
137 uint32_t val = ldl_le_p(cache_mem + in cxl_hdm_find_target()
142 uint32_t val = ldl_le_p(cache_mem + in cxl_hdm_find_target()
/qemu/hw/i386/
H A Dmultiboot.c172 if (ldl_le_p(header + i) == 0x1BADB002) { in load_multiboot()
173 uint32_t checksum = ldl_le_p(header + i + 8); in load_multiboot()
174 flags = ldl_le_p(header + i + 4); in load_multiboot()
227 uint32_t mh_header_addr = ldl_le_p(header + i + 12); in load_multiboot()
228 uint32_t mh_load_end_addr = ldl_le_p(header + i + 20); in load_multiboot()
229 uint32_t mh_bss_end_addr = ldl_le_p(header + i + 24); in load_multiboot()
231 mh_load_addr = ldl_le_p(header + i + 16); in load_multiboot()
243 mh_entry_addr = ldl_le_p(header + i + 28); in load_multiboot()
H A Dx86-common.c596 if (ldl_le_p(header) != 0x464c457f) { in load_elfboot()
679 if (ldl_le_p(header + 0x202) == 0x53726448) /* Magic signature "HdrS" */ { in x86_load_linux()
793 initrd_max = ldl_le_p(header + 0x22c); in x86_load_linux()
H A Damd_iommu.c106 return ldl_le_p(&s->mmior[addr]); in amdvi_readl()
132 uint32_t romask = ldl_le_p(&s->romask[addr]); in amdvi_writel()
133 uint32_t w1cmask = ldl_le_p(&s->w1cmask[addr]); in amdvi_writel()
134 uint32_t oldval = ldl_le_p(&s->mmior[addr]); in amdvi_writel()
/qemu/hw/riscv/
H A Driscv-iommu.h122 uint32_t val = ldl_le_p(s->regs_rw + idx); in riscv_iommu_reg_mod32()
135 return ldl_le_p(s->regs_rw + idx); in riscv_iommu_reg_get32()
/qemu/hw/mem/
H A Dcxl_type3.c417 ctrl = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_CTRL + which * hdm_inc); in hdm_decoder_commit()
432 ctrl = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_CTRL + which * hdm_inc); in hdm_decoder_uncommit()
537 uint32_t capctrl = ldl_le_p(cache_mem + R_CXL_RAS_ERR_CAP_CTRL); in ct3d_reg_write()
609 uint32_t temp = ldl_le_p((uint8_t *)cache_mem + offset); in ct3d_reg_write()
1072 cap = ldl_le_p(cache_mem + R_CXL_HDM_DECODER_CAPABILITY); in cxl_type3_dpa()
1082 low = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_BASE_LO + i * hdm_inc); in cxl_type3_dpa()
1083 high = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_BASE_HI + i * hdm_inc); in cxl_type3_dpa()
1086 low = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_SIZE_LO + i * hdm_inc); in cxl_type3_dpa()
1087 high = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_SIZE_HI + i * hdm_inc); in cxl_type3_dpa()
1090 low = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_DPA_SKIP_LO + in cxl_type3_dpa()
[all …]
/qemu/target/loongarch/
H A Dgdbstub.c76 tmp = ldl_le_p(mem_buf); in loongarch_cpu_gdb_write_register()
116 env->fcsr0 = ldl_le_p(mem_buf); in loongarch_gdb_set_fpu()
/qemu/target/avr/
H A Dgdbstub.c78 env->pc_w = ldl_le_p(mem_buf) / 2; in avr_cpu_gdb_write_register()
/qemu/hw/display/
H A Dvga-access.h48 return ldl_le_p(ptr); in vga_read_dword_le()
H A Dbcm2835_fb.c85 rgb888 = ldl_le_p(src); in draw_line_src16()
92 rgb888 = ldl_le_p(src); in draw_line_src16()
/qemu/include/qemu/
H A Dhost-pci-mmio.h46 ret = ldl_le_p(ioaddr); in host_pci_ldl_le_p()
H A Dbswap.h306 static inline int ldl_le_p(const void *ptr) in ldl_le_p() function
/qemu/target/tricore/
H A Dgdbstub.c127 tmp = ldl_le_p(mem_buf); in tricore_cpu_gdb_write_register()
/qemu/include/gdbstub/
H A Dhelpers.h103 #define ldtul_le_p(addr) ldl_le_p(addr)
/qemu/hw/pci-host/
H A Dsh_pci.c84 return ldl_le_p(pcic->dev->config + addr); in sh_pci_reg_read()
/qemu/target/i386/tcg/
H A Daccess.c112 return ldl_le_p(p); in access_ldl()
/qemu/include/hw/virtio/
H A Dvirtio-access.h137 return ldl_le_p(ptr); in virtio_ldl_p()
/qemu/hw/nvram/
H A Dnrf51_nvm.c296 oldval = ldl_le_p(s->storage + offset); in flash_write()
/qemu/hw/net/rocker/
H A Drocker_tlv.h114 return ldl_le_p(rocker_tlv_data(tlv)); in rocker_tlv_get_le32()
/qemu/disas/
H A Dcapstone.c120 print(stream, " %08x", ldl_le_p(insn->bytes + i)); in cap_dump_insn_units()
/qemu/hw/net/
H A De1000x_common.c66 ldl_le_p((uint32_t *)(mac + VFTA) + in e1000x_rx_vlan_filter()
/qemu/include/disas/
H A Ddis-asm.h482 return (uint32_t)ldl_le_p(addr); in bfd_getl32()

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