Home
last modified time | relevance | path

Searched refs:idx (Results 1 – 25 of 303) sorted by relevance

12345678910>>...13

/qemu/hw/hyperv/
H A Dhv-balloon-our_range_memslots.c61 unsigned int idx; in our_range_memslots_init_slots() local
69 for (idx = 0, memslot_offset = 0; idx < memslots->count; in our_range_memslots_init_slots()
70 idx++, memslot_offset += memslots->size_each) { in our_range_memslots_init_slots()
75 if (idx == memslots->count - 1) { in our_range_memslots_init_slots()
85 name = g_strdup_printf("memslot-%u", idx); in our_range_memslots_init_slots()
86 memory_region_init_alias(&memslots->slots[idx], memslot_owner, name, in our_range_memslots_init_slots()
93 memory_region_set_unmergeable(&memslots->slots[idx], true); in our_range_memslots_init_slots()
123 unsigned int idx; in our_range_memslots_free_memslots() local
127 for (idx = 0, offset = 0; idx < memslots->mapped_count; in our_range_memslots_free_memslots()
128 idx++, offset += memslots->size_each) { in our_range_memslots_free_memslots()
[all …]
/qemu/scripts/
H A Dqcow2-to-stdout.py50 def bitmap_set(bitmap, idx): argument
51 bitmap[idx // 8] |= 1 << (idx % 8)
54 def bitmap_is_set(bitmap, idx): argument
55 return (bitmap[idx // 8] & (1 << (idx % 8))) != 0
59 for idx in range(length):
60 if bitmap_is_set(bitmap, idx):
61 yield idx
77 for idx in range(data_from // cluster_size, data_to // cluster_size):
78 yield idx
184 for idx in range(l1_entries):
[all …]
/qemu/target/i386/whpx/
H A Dwhpx-all.c388 int idx; in whpx_set_registers() local
411 idx = 0; in whpx_set_registers()
415 for (idx = 0; idx < CPU_NB_REGS; idx += 1) { in whpx_set_registers()
416 vcxt.values[idx].Reg64 = (uint64_t)env->regs[idx]; in whpx_set_registers()
418 idx = idx_next; in whpx_set_registers()
421 assert(whpx_register_names[idx] == WHvX64RegisterRip); in whpx_set_registers()
422 vcxt.values[idx++].Reg64 = env->eip; in whpx_set_registers()
424 assert(whpx_register_names[idx] == WHvX64RegisterRflags); in whpx_set_registers()
425 vcxt.values[idx++].Reg64 = env->eflags; in whpx_set_registers()
428 assert(idx == WHvX64RegisterEs); in whpx_set_registers()
[all …]
/qemu/trace/
H A Dsimple.c79 static void read_from_buffer(unsigned int idx, void *dataptr, size_t size);
80 static unsigned int write_to_buffer(unsigned int idx, void *dataptr, size_t size);
82 static void clear_buffer_range(unsigned int idx, size_t len) in clear_buffer_range() argument
86 if (idx >= TRACE_BUF_LEN) { in clear_buffer_range()
87 idx = idx % TRACE_BUF_LEN; in clear_buffer_range()
89 trace_buf[idx++] = 0; in clear_buffer_range()
101 static bool get_trace_record(unsigned int idx, TraceRecord **recordptr) in get_trace_record() argument
106 read_from_buffer(idx, &record, sizeof(event_flag)); in get_trace_record()
114 read_from_buffer(idx, &record, sizeof(TraceRecord)); in get_trace_record()
117 read_from_buffer(idx, *recordptr, record.length); in get_trace_record()
[all …]
/qemu/hw/pci-host/
H A Dppce500.c133 int idx; in pci_reg_read4() local
142 idx = (addr >> 5) & 0x7; in pci_reg_read4()
145 value = pci->pob[idx].potar; in pci_reg_read4()
148 value = pci->pob[idx].potear; in pci_reg_read4()
151 value = pci->pob[idx].powbar; in pci_reg_read4()
154 value = pci->pob[idx].powar; in pci_reg_read4()
164 idx = ((addr >> 5) & 0x3) - 1; in pci_reg_read4()
167 value = pci->pib[idx].pitar; in pci_reg_read4()
170 value = pci->pib[idx].piwbar; in pci_reg_read4()
173 value = pci->pib[idx].piwbear; in pci_reg_read4()
[all …]
H A Dppc440_pcix.c113 static void ppc440_pcix_update_pim(PPC440PCIXState *s, int idx) in ppc440_pcix_update_pim() argument
115 MemoryRegion *mem = &s->pim[idx].mr; in ppc440_pcix_update_pim()
122 if (!(s->pim[idx].sa & 1)) { in ppc440_pcix_update_pim()
127 name = g_strdup_printf("PCI Inbound Window %d", idx); in ppc440_pcix_update_pim()
128 size = ~(s->pim[idx].sa & ~7ULL) + 1; in ppc440_pcix_update_pim()
130 s->pim[idx].la, size); in ppc440_pcix_update_pim()
134 trace_ppc440_pcix_update_pim(idx, size, s->pim[idx].la); in ppc440_pcix_update_pim()
138 static void ppc440_pcix_update_pom(PPC440PCIXState *s, int idx) in ppc440_pcix_update_pom() argument
140 MemoryRegion *mem = &s->pom[idx].mr; in ppc440_pcix_update_pom()
148 if (!(s->pom[idx].sa & 1)) { in ppc440_pcix_update_pom()
[all …]
/qemu/target/openrisc/
H A Dsys_helper.c49 int idx; in HELPER() local
97 idx = (spr - 1024); in HELPER()
98 env->shadow_gpr[idx / 32][idx % 32] = rb; in HELPER()
102 idx = spr - TO_SPR(1, 512); in HELPER()
103 mr = env->tlb.dtlb[idx].mr; in HELPER()
110 env->tlb.dtlb[idx].mr = rb; in HELPER()
113 idx = spr - TO_SPR(1, 640); in HELPER()
114 env->tlb.dtlb[idx].tr = rb; in HELPER()
125 idx = spr - TO_SPR(2, 512); in HELPER()
126 mr = env->tlb.itlb[idx].mr; in HELPER()
[all …]
/qemu/tcg/
H A Dtcg-op-ldst.c231 TCGArg idx, MemOp memop) in tcg_gen_qemu_ld_i32_int() argument
239 orig_oi = oi = make_memop_idx(memop, idx); in tcg_gen_qemu_ld_i32_int()
247 oi = make_memop_idx(memop, idx); in tcg_gen_qemu_ld_i32_int()
271 void tcg_gen_qemu_ld_i32_chk(TCGv_i32 val, TCGTemp *addr, TCGArg idx, in tcg_gen_qemu_ld_i32_chk() argument
276 tcg_gen_qemu_ld_i32_int(val, addr, idx, memop); in tcg_gen_qemu_ld_i32_chk()
280 TCGArg idx, MemOp memop) in tcg_gen_qemu_st_i32_int() argument
287 orig_oi = oi = make_memop_idx(memop, idx); in tcg_gen_qemu_st_i32_int()
303 oi = make_memop_idx(memop, idx); in tcg_gen_qemu_st_i32_int()
314 void tcg_gen_qemu_st_i32_chk(TCGv_i32 val, TCGTemp *addr, TCGArg idx, in tcg_gen_qemu_st_i32_chk() argument
319 tcg_gen_qemu_st_i32_int(val, addr, idx, memop); in tcg_gen_qemu_st_i32_chk()
[all …]
/qemu/hw/riscv/
H A Driscv-iommu.h120 unsigned idx, uint32_t set, uint32_t clr) in riscv_iommu_reg_mod32() argument
122 uint32_t val = ldl_le_p(s->regs_rw + idx); in riscv_iommu_reg_mod32()
123 stl_le_p(s->regs_rw + idx, (val & ~clr) | set); in riscv_iommu_reg_mod32()
127 static inline void riscv_iommu_reg_set32(RISCVIOMMUState *s, unsigned idx, in riscv_iommu_reg_set32() argument
130 stl_le_p(s->regs_rw + idx, set); in riscv_iommu_reg_set32()
133 static inline uint32_t riscv_iommu_reg_get32(RISCVIOMMUState *s, unsigned idx) in riscv_iommu_reg_get32() argument
135 return ldl_le_p(s->regs_rw + idx); in riscv_iommu_reg_get32()
138 static inline uint64_t riscv_iommu_reg_mod64(RISCVIOMMUState *s, unsigned idx, in riscv_iommu_reg_mod64() argument
141 uint64_t val = ldq_le_p(s->regs_rw + idx); in riscv_iommu_reg_mod64()
142 stq_le_p(s->regs_rw + idx, (val & ~clr) | set); in riscv_iommu_reg_mod64()
[all …]
H A Driscv_hart.c112 static bool riscv_hart_realize(RISCVHartArrayState *s, int idx, in riscv_hart_realize() argument
115 object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], cpu_type); in riscv_hart_realize()
116 qdev_prop_set_uint64(DEVICE(&s->harts[idx]), "resetvec", s->resetvec); in riscv_hart_realize()
118 if (s->harts[idx].cfg.ext_smrnmi) { in riscv_hart_realize()
119 if (idx < s->num_rnmi_irqvec) { in riscv_hart_realize()
120 qdev_prop_set_uint64(DEVICE(&s->harts[idx]), in riscv_hart_realize()
121 "rnmi-interrupt-vector", s->rnmi_irqvec[idx]); in riscv_hart_realize()
124 if (idx < s->num_rnmi_excpvec) { in riscv_hart_realize()
125 qdev_prop_set_uint64(DEVICE(&s->harts[idx]), in riscv_hart_realize()
126 "rnmi-exception-vector", s->rnmi_excpvec[idx]); in riscv_hart_realize()
[all …]
/qemu/hw/misc/
H A Dallwinner-h3-dramc.c102 const uint32_t idx = REG_INDEX(offset); in allwinner_h3_dramcom_read() local
104 if (idx >= AW_H3_DRAMCOM_REGS_NUM) { in allwinner_h3_dramcom_read()
110 trace_allwinner_h3_dramcom_read(offset, s->dramcom[idx], size); in allwinner_h3_dramcom_read()
112 return s->dramcom[idx]; in allwinner_h3_dramcom_read()
119 const uint32_t idx = REG_INDEX(offset); in allwinner_h3_dramcom_write() local
123 if (idx >= AW_H3_DRAMCOM_REGS_NUM) { in allwinner_h3_dramcom_write()
139 s->dramcom[idx] = (uint32_t) val; in allwinner_h3_dramcom_write()
146 const uint32_t idx = REG_INDEX(offset); in allwinner_h3_dramctl_read() local
148 if (idx >= AW_H3_DRAMCTL_REGS_NUM) { in allwinner_h3_dramctl_read()
154 trace_allwinner_h3_dramctl_read(offset, s->dramctl[idx], size); in allwinner_h3_dramctl_read()
[all …]
H A Dallwinner-r40-dramc.c185 const uint32_t idx = REG_INDEX(offset); in allwinner_r40_dramcom_read() local
187 if (idx >= AW_R40_DRAMCOM_REGS_NUM) { in allwinner_r40_dramcom_read()
193 trace_allwinner_r40_dramcom_read(offset, s->dramcom[idx], size); in allwinner_r40_dramcom_read()
194 return s->dramcom[idx]; in allwinner_r40_dramcom_read()
201 const uint32_t idx = REG_INDEX(offset); in allwinner_r40_dramcom_write() local
205 if (idx >= AW_R40_DRAMCOM_REGS_NUM) { in allwinner_r40_dramcom_write()
221 s->dramcom[idx] = (uint32_t) val; in allwinner_r40_dramcom_write()
228 const uint32_t idx = REG_INDEX(offset); in allwinner_r40_dramctl_read() local
230 if (idx >= AW_R40_DRAMCTL_REGS_NUM) { in allwinner_r40_dramctl_read()
236 trace_allwinner_r40_dramctl_read(offset, s->dramctl[idx], size); in allwinner_r40_dramctl_read()
[all …]
/qemu/hw/intc/
H A Dopenpic.c174 int idx);
176 uint32_t val, int idx);
567 int idx; in openpic_gbl_write() local
595 for (idx = 0; idx < opp->nb_cpus; idx++) { in openpic_gbl_write()
596 if ((val & (1 << idx)) && !(opp->pir & (1 << idx))) { in openpic_gbl_write()
597 DPRINTF("Raise OpenPIC RESET output for CPU %d", idx); in openpic_gbl_write()
598 dst = &opp->dst[idx]; in openpic_gbl_write()
600 } else if (!(val & (1 << idx)) && (opp->pir & (1 << idx))) { in openpic_gbl_write()
601 DPRINTF("Lower OpenPIC RESET output for CPU %d", idx); in openpic_gbl_write()
602 dst = &opp->dst[idx]; in openpic_gbl_write()
[all …]
H A Dpnv_xive.c102 uint64_t vsd, uint32_t idx) in pnv_xive_vst_addr_direct() argument
110 if (idx > idx_max) { in pnv_xive_vst_addr_direct()
113 info->name, idx, idx_max); in pnv_xive_vst_addr_direct()
118 return vst_addr + idx * info->size; in pnv_xive_vst_addr_direct()
122 uint64_t vsd, uint32_t idx) in pnv_xive_vst_addr_indirect() argument
135 info->name, idx, vsd_addr); in pnv_xive_vst_addr_indirect()
141 xive_error(xive, "VST: invalid %s entry %x !?", info->name, idx); in pnv_xive_vst_addr_indirect()
155 vsd_idx = idx / vst_per_page; in pnv_xive_vst_addr_indirect()
169 xive_error(xive, "VST: invalid %s entry %x !?", info->name, idx); in pnv_xive_vst_addr_indirect()
180 info->name, idx); in pnv_xive_vst_addr_indirect()
[all …]
/qemu/include/system/
H A Dram_addr.h165 unsigned long idx, offset, base; in cpu_physical_memory_get_dirty() local
176 idx = page / DIRTY_MEMORY_BLOCK_SIZE; in cpu_physical_memory_get_dirty()
182 unsigned long found = find_next_bit(blocks->blocks[idx], in cpu_physical_memory_get_dirty()
190 idx++; in cpu_physical_memory_get_dirty()
205 unsigned long idx, offset, base; in cpu_physical_memory_all_dirty() local
217 idx = page / DIRTY_MEMORY_BLOCK_SIZE; in cpu_physical_memory_all_dirty()
223 unsigned long found = find_next_zero_bit(blocks->blocks[idx], num, offset); in cpu_physical_memory_all_dirty()
230 idx++; in cpu_physical_memory_all_dirty()
277 unsigned long page, idx, offset; in cpu_physical_memory_set_dirty_flag() local
283 idx = page / DIRTY_MEMORY_BLOCK_SIZE; in cpu_physical_memory_set_dirty_flag()
[all …]
/qemu/hw/acpi/
H A Dtrace-events27 cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32
28 cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags: 0x%"PRIx8
29 cpuhp_acpi_write_idx(uint32_t idx) "set active cpu idx: 0x%"PRIx32
30 cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) "idx[0x%"PRIx32"] cmd: 0x%"PRIx8
31 cpuhp_acpi_read_cmd_data(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32
32 cpuhp_acpi_read_cmd_data2(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32
33 cpuhp_acpi_cpu_has_events(uint32_t idx, bool ins, bool rm) "idx[0x%"PRIx32"] inserting: %d, removin…
34 cpuhp_acpi_clear_inserting_evt(uint32_t idx) "idx[0x%"PRIx32"]"
35 cpuhp_acpi_clear_remove_evt(uint32_t idx) "idx[0x%"PRIx32"]"
36 cpuhp_acpi_ejecting_invalid_cpu(uint32_t idx) "0x%"PRIx32
[all …]
/qemu/bsd-user/i386/
H A Dtarget_arch_sysarch.h30 int idx; in do_freebsd_arch_sysarch() local
36 idx = R_GS; in do_freebsd_arch_sysarch()
38 idx = R_FS; in do_freebsd_arch_sysarch()
43 cpu_x86_load_seg(env, idx, 0); in do_freebsd_arch_sysarch()
44 env->segs[idx].base = val; in do_freebsd_arch_sysarch()
50 idx = R_GS; in do_freebsd_arch_sysarch()
52 idx = R_FS; in do_freebsd_arch_sysarch()
54 val = env->segs[idx].base; in do_freebsd_arch_sysarch()
/qemu/bsd-user/x86_64/
H A Dtarget_arch_sysarch.h29 int idx; in do_freebsd_arch_sysarch() local
35 idx = R_GS; in do_freebsd_arch_sysarch()
37 idx = R_FS; in do_freebsd_arch_sysarch()
42 cpu_x86_load_seg(env, idx, 0); in do_freebsd_arch_sysarch()
43 env->segs[idx].base = val; in do_freebsd_arch_sysarch()
49 idx = R_GS; in do_freebsd_arch_sysarch()
51 idx = R_FS; in do_freebsd_arch_sysarch()
53 val = env->segs[idx].base; in do_freebsd_arch_sysarch()
/qemu/ui/
H A Dvnc-palette.c79 unsigned int idx = palette->size; in palette_put() local
91 entry->idx = idx; in palette_put()
105 return (entry == NULL ? -1 : entry->idx); in palette_idx()
114 void (*iter)(int idx, uint32_t color, void *opaque), in palette_iter() argument
122 iter(entry->idx, entry->color, opaque); in palette_iter()
127 uint32_t palette_color(const VncPalette *palette, int idx, bool *found) in palette_color() argument
134 if (entry->idx == idx) { in palette_color()
145 static void palette_fill_cb(int idx, uint32_t color, void *opaque) in palette_fill_cb() argument
149 colors[idx] = color; in palette_fill_cb()
/qemu/target/ppc/
H A Dmmu-books.h27 static inline bool mmuidx_pr(int idx) { return !(idx & 1); } in mmuidx_pr() argument
28 static inline bool mmuidx_real(int idx) { return idx & 2; } in mmuidx_real() argument
29 static inline bool mmuidx_hv(int idx) { return idx & 4; } in mmuidx_hv() argument
/qemu/util/
H A Dreadline.c180 int idx; in readline_up_char() local
187 for (idx = 0; idx < READLINE_MAX_CMDS; idx++) { in readline_up_char()
188 if (rs->history[idx] == NULL) { in readline_up_char()
192 rs->hist_entry = idx; in readline_up_char()
221 int idx; in readline_hist_add() local
230 idx = rs->hist_entry; in readline_hist_add()
236 for (idx = 0; idx < READLINE_MAX_CMDS; idx++) { in readline_hist_add()
237 hist_entry = rs->history[idx]; in readline_hist_add()
243 if (idx == READLINE_MAX_CMDS - 1) { in readline_hist_add()
248 memmove(&rs->history[idx], &rs->history[idx + 1], in readline_hist_add()
[all …]
H A Datomic64.c36 uintptr_t idx; in addr_to_lock() local
38 idx = a >> qemu_dcache_linesize_log; in addr_to_lock()
39 idx ^= (idx >> 8) ^ (idx >> 16); in addr_to_lock()
40 idx &= NR_LOCKS - 1; in addr_to_lock()
41 return lock_array + idx * lock_size; in addr_to_lock()
/qemu/hw/vfio/
H A Dmigration-multifd.c33 uint32_t idx; member
101 unsigned int idx) in vfio_state_buffers_at() argument
103 return &g_array_index(bufs->array, VFIOStateBuffer, idx); in vfio_state_buffers_at()
117 if (packet->idx >= vfio_state_buffers_size_get(&multifd->load_bufs)) { in vfio_load_state_buffer_insert()
118 vfio_state_buffers_size_set(&multifd->load_bufs, packet->idx + 1); in vfio_load_state_buffer_insert()
121 lb = vfio_state_buffers_at(&multifd->load_bufs, packet->idx); in vfio_load_state_buffer_insert()
124 vbasedev->name, packet->idx); in vfio_load_state_buffer_insert()
128 assert(packet->idx >= multifd->load_buf_idx); in vfio_load_state_buffer_insert()
167 packet->idx = be32_to_cpu(packet->idx); in vfio_multifd_load_state_buffer()
170 if (packet->idx == UINT32_MAX) { in vfio_multifd_load_state_buffer()
[all …]
/qemu/hw/ide/
H A Datapi.c713 unsigned idx = 0; in cmd_inquiry() local
723 buf[idx++] = 0x05; /* CD-ROM */ in cmd_inquiry()
724 buf[idx++] = page_code; /* Page Code */ in cmd_inquiry()
725 buf[idx++] = 0x00; /* reserved */ in cmd_inquiry()
726 idx++; /* length (set later) */ in cmd_inquiry()
731 buf[idx++] = 0x00; /* 0x00: Supported Pages, and: */ in cmd_inquiry()
732 buf[idx++] = 0x83; /* 0x83: Device Identification. */ in cmd_inquiry()
741 if (idx + 24 > max_len) { in cmd_inquiry()
748 buf[idx++] = 0x02; /* Ascii */ in cmd_inquiry()
749 buf[idx++] = 0x00; /* Vendor Specific */ in cmd_inquiry()
[all …]
/qemu/target/i386/hvf/
H A Dx86_cpuid.c58 uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, in hvf_get_supported_cpuid() argument
65 host_cpuid(func, idx, &eax, &ebx, &ecx, &edx); in hvf_get_supported_cpuid()
92 if (idx == 0) { in hvf_get_supported_cpuid()
122 if (!supported_xcr0 || idx >= 63 || in hvf_get_supported_cpuid()
123 (idx > 1 && !(supported_xcr0 & (UINT64_C(1) << idx)))) { in hvf_get_supported_cpuid()
128 if (idx == 0) { in hvf_get_supported_cpuid()
130 } else if (idx == 1) { in hvf_get_supported_cpuid()

12345678910>>...13