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Searched refs:iaoq_f (Results 1 – 13 of 13) sorted by relevance

/qemu/linux-user/hppa/
H A Dcpu_loop.c134 env->iaoq_f = env->gr[31] | PRIV_USER; in cpu_loop()
135 env->iaoq_b = env->iaoq_f + 4; in cpu_loop()
145 env->iaoq_f = env->gr[31] | PRIV_USER; in cpu_loop()
146 env->iaoq_b = env->iaoq_f + 4; in cpu_loop()
149 force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MAPERR, env->iaoq_f); in cpu_loop()
152 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->iaoq_f); in cpu_loop()
157 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->iaoq_f); in cpu_loop()
159 force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVOPC, env->iaoq_f); in cpu_loop()
163 force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVREG, env->iaoq_f); in cpu_loop()
166 force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->iaoq_f); in cpu_loop()
[all …]
H A Dsignal.c68 __put_user(env->iaoq_f, &sc->sc_iaoq[0]); in setup_sigcontext()
103 __get_user(env->iaoq_f, &sc->sc_iaoq[0]); in restore_sigcontext()
104 env->iaoq_f |= PRIV_USER; in restore_sigcontext()
167 env->iaoq_f = haddr | PRIV_USER; in setup_rt_frame()
168 env->iaoq_b = env->iaoq_f + 4; in setup_rt_frame()
H A Dtarget_cpu.h31 env->iaoq_f = env->gr[31] | PRIV_USER; in cpu_clone_regs_child()
32 env->iaoq_b = env->iaoq_f + 4; in cpu_clone_regs_child()
/qemu/target/hppa/
H A Dint_helper.c116 hppa_form_gva_mask(old_gva_offset_mask, env->iasq_f, env->iaoq_f) >> 32; in hppa_cpu_do_interrupt()
125 env->cr[CR_IIAOQ] = env->iaoq_f; in hppa_cpu_do_interrupt()
128 env->cr[CR_IIAOQ] = (uint32_t)env->iaoq_f; in hppa_cpu_do_interrupt()
163 vaddr vaddr = env->iaoq_f & -4; in hppa_cpu_do_interrupt()
204 env->iaoq_f = hppa_form_gva(env, 0, FIRMWARE_START); in hppa_cpu_do_interrupt()
209 env->iaoq_f = hppa_form_gva(env, 0, env->cr[CR_IVA] + 32 * i); in hppa_cpu_do_interrupt()
211 env->iaoq_b = hppa_form_gva(env, 0, env->iaoq_f + 4); in hppa_cpu_do_interrupt()
H A Dcpu.c41 cpu->env.iaoq_f = value; in hppa_cpu_set_pc()
51 env->iaoq_f & -4); in hppa_cpu_get_pc()
68 flags |= (env->iaoq_f & 3) << TB_FLAG_PRIV_SHIFT; in hppa_get_tb_cpu_state()
78 } else if ((env->iaoq_f ^ env->iaoq_b) & TARGET_PAGE_MASK) { in hppa_get_tb_cpu_state()
122 env->iaoq_f = (env->iaoq_f & TARGET_PAGE_MASK) | data[0]; in hppa_restore_state_to_opc()
124 env->iaoq_b = env->iaoq_f + data[1]; in hppa_restore_state_to_opc()
147 return PRIV_P_TO_MMU_IDX(env->iaoq_f & 3, env->psw & PSW_P); in hppa_cpu_mmu_index()
H A Dsys_helper.c92 env->iaoq_f = env->cr[CR_IIAOQ]; in HELPER()
94 env->iasq_f = (env->cr[CR_IIASQ] << 32) & ~(env->iaoq_f & mask); in HELPER()
H A Dmem_helper.c421 env->iasq_f, env->iaoq_f, physaddr); in hppa_cpu_do_transaction_failed()
804 uint64_t HELPER(b_gate_priv)(CPUHPPAState *env, uint64_t iaoq_f) in HELPER()
806 uint64_t gva = hppa_form_gva(env, env->iasq_f, iaoq_f); in HELPER()
821 int old_priv = iaoq_f & 3; in HELPER()
825 iaoq_f = (iaoq_f & -4) | new_priv; in HELPER()
828 return iaoq_f; in HELPER()
H A Dgdbstub.c46 val = env->iaoq_f; in hppa_cpu_gdb_read_register()
169 env->iaoq_f = val; in hppa_cpu_gdb_write_register()
H A Dhelper.c153 env->iasq_f >> 32, w, m & env->iaoq_f, in hppa_cpu_dump_state()
155 env->iaoq_f), in hppa_cpu_dump_state()
H A Dmachine.c195 VMSTATE_UINT64(iaoq_f, CPUHPPAState),
H A Dcpu.h205 target_ulong iaoq_f; /* front */ member
H A Dop_helper.c335 if (level < (env->iaoq_f & 3)) { in HELPER()
H A Dtranslate.c282 DEF_VAR(iaoq_f), in hppa_translate_init()
4693 uint64_t iaoq_f, iaoq_b; in hppa_tr_insn_start() local
4698 iaoq_f = ctx->iaoq_first + ctx->iaq_f.disp; in hppa_tr_insn_start()
4703 diff = iaoq_b - iaoq_f; in hppa_tr_insn_start()
4709 tcg_gen_insn_start(iaoq_f & ~TARGET_PAGE_MASK, diff, 0); in hppa_tr_insn_start()