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Searched refs:handlers (Results 1 – 16 of 16) sorted by relevance

/qemu/ui/
H A Dinput.c37 static QTAILQ_HEAD(, QemuInputHandlerState) handlers =
38 QTAILQ_HEAD_INITIALIZER(handlers);
57 QTAILQ_INSERT_TAIL(&handlers, s, node); in qemu_input_handler_register()
65 QTAILQ_REMOVE(&handlers, s, node); in qemu_input_handler_activate()
66 QTAILQ_INSERT_HEAD(&handlers, s, node); in qemu_input_handler_activate()
72 QTAILQ_REMOVE(&handlers, s, node); in qemu_input_handler_deactivate()
73 QTAILQ_INSERT_TAIL(&handlers, s, node); in qemu_input_handler_deactivate()
79 QTAILQ_REMOVE(&handlers, s, node); in qemu_input_handler_unregister()
105 QTAILQ_FOREACH(s, &handlers, node) { in qemu_input_find_handler()
114 QTAILQ_FOREACH(s, &handlers, node) { in qemu_input_find_handler()
[all …]
/qemu/hw/i386/
H A Dvapic.c409 VAPICHandlers *handlers = info->handler; in do_patch_instruction() local
419 patch_call(x86_cpu, ip + 1, handlers->set_tpr); in do_patch_instruction()
423 patch_call(x86_cpu, ip + 1, handlers->get_tpr[modrm_reg(opcode[1])]); in do_patch_instruction()
426 patch_call(x86_cpu, ip, handlers->get_tpr[0]); in do_patch_instruction()
429 patch_call(x86_cpu, ip, handlers->set_tpr_eax); in do_patch_instruction()
435 patch_call(x86_cpu, ip + 5, handlers->set_tpr); in do_patch_instruction()
439 patch_call(x86_cpu, ip + 1, handlers->get_tpr_stack); in do_patch_instruction()
452 VAPICHandlers *handlers; in patch_instruction() local
456 handlers = &s->rom_state.up; in patch_instruction()
458 handlers = &s->rom_state.mp; in patch_instruction()
[all …]
/qemu/migration/
H A Dsavevm.c256 QTAILQ_HEAD(, SaveStateEntry) handlers;
268 .handlers = QTAILQ_HEAD_INITIALIZER(savevm_state.handlers),
709 QTAILQ_FOREACH(se, &savevm_state.handlers, entry) { in calculate_new_instance_id()
725 QTAILQ_FOREACH(se, &savevm_state.handlers, entry) { in calculate_compat_instance_id()
777 QTAILQ_INSERT_TAIL(&savevm_state.handlers, nse, entry); in savevm_state_handler_insert()
798 QTAILQ_REMOVE(&savevm_state.handlers, se, entry); in savevm_state_handler_remove()
851 QTAILQ_FOREACH_SAFE(se, &savevm_state.handlers, entry, new_se) { in unregister_savevm()
957 QTAILQ_FOREACH_SAFE(se, &savevm_state.handlers, entry, new_se) { in vmstate_unregister()
1254 QTAILQ_FOREACH(se, &savevm_state.handlers, entr in qemu_savevm_state_blocked()
[all...]
/qemu/hw/misc/macio/
H A Dcuda.c370 static const CudaCommand handlers[] = { variable
390 for (i = 0; i < ARRAY_SIZE(handlers); i++) { in cuda_receive_packet()
391 const CudaCommand *desc = &handlers[i]; in cuda_receive_packet()
/qemu/docs/devel/
H A Duefi-vars.rst38 reimplements the handlers needed, specifically
H A Dlockcnt.rst168 bottom halves and file descriptor handlers. Modifications to the list
169 of file descriptor handlers are rare. Creation of a new bottom half is
H A Dcontrol-flow-integrity.rst82 5. Directly calling signal handlers from the QEMU source code, since the
H A Dtcg.rst157 The host SIGSEGV and SIGBUS signal handlers are used to get invalid
H A Dmulti-process.rst339 MMIO handlers, or creating a child bus that other proxy devices can be
500 install their MMIO handlers, and ``pci_register_bar()`` to associate
501 those handlers with a PCI BAR, as they do within QEMU currently.
H A Datomics.rst58 by signal handlers.
/qemu/hw/block/
H A Dfdc.c2160 static const FDCtrlCommand handlers[] = { variable
2202 FLOPPY_DPRINTF("%s command\n", handlers[idx].name); in get_command()
2203 return &handlers[idx]; in get_command()
2356 for (i = ARRAY_SIZE(handlers) - 1; i >= 0; i--) { in fdctrl_realize_common()
2358 if ((j & handlers[i].mask) == handlers[i].value) { in fdctrl_realize_common()
/qemu/target/i386/emulate/
H A Dx86_emu.c1191 } handlers[] = { variable
1241 for (i = 0; i < ARRAY_SIZE(handlers); i++) { in init_cmd_handler()
1242 _cmd_handler[handlers[i].cmd] = handlers[i]; in init_cmd_handler()
/qemu/tests/tcg/tricore/c/
H A Dcrt0-tc2x.S64 #; install trap handlers
/qemu/python/qemu/qmp/
H A Dqmp_tui.py124 for handler in logger.handlers:
/qemu/net/
H A Dvmnet-common.m261 * Called on state change to un-register/re-register handlers
/qemu/target/s390x/tcg/
H A Dtranslate_vx.c.inc19 * are handled via gvec ool (out-of-line) handlers.