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Searched refs:f16 (Results 1 – 8 of 8) sorted by relevance

/qemu/target/arm/tcg/
H A Dhelper-a64.h26 DEF_HELPER_3(vfp_cmph_a64, i64, f16, f16, fpst)
27 DEF_HELPER_3(vfp_cmpeh_a64, i64, f16, f16, fpst)
38 DEF_HELPER_FLAGS_3(recpsf_f16, TCG_CALL_NO_RWG, f16, f16, f16, fpst)
41 DEF_HELPER_FLAGS_3(recpsf_ah_f16, TCG_CALL_NO_RWG, f16, f16, f16, fpst)
44 DEF_HELPER_FLAGS_3(rsqrtsf_f16, TCG_CALL_NO_RWG, f16, f16, f16, fpst)
47 DEF_HELPER_FLAGS_3(rsqrtsf_ah_f16, TCG_CALL_NO_RWG, f16, f16, f16, fpst)
52 DEF_HELPER_FLAGS_2(frecpx_f16, TCG_CALL_NO_RWG, f16, f16, fpst)
56 DEF_HELPER_3(advsimd_ceq_f16, i32, f16, f16, fpst)
57 DEF_HELPER_3(advsimd_cge_f16, i32, f16, f16, fpst)
58 DEF_HELPER_3(advsimd_cgt_f16, i32, f16, f16, fpst)
[all …]
H A Dhelper.h114 DEF_HELPER_3(vfp_addh, f16, f16, f16, fpst)
117 DEF_HELPER_3(vfp_subh, f16, f16, f16, fpst)
120 DEF_HELPER_3(vfp_mulh, f16, f16, f16, fpst)
123 DEF_HELPER_3(vfp_divh, f16, f16, f16, fpst)
126 DEF_HELPER_3(vfp_maxh, f16, f16, f16, fpst)
129 DEF_HELPER_3(vfp_minh, f16, f16, f16, fpst)
132 DEF_HELPER_3(vfp_maxnumh, f16, f16, f16, fpst)
135 DEF_HELPER_3(vfp_minnumh, f16, f16, f16, fpst)
138 DEF_HELPER_2(vfp_sqrth, f16, f16, fpst)
141 DEF_HELPER_3(vfp_cmph, void, f16, f16, env)
[all …]
H A Dvfp_helper.c674 float16 f16 = float16_squash_input_denormal(input, fpst); in HELPER() local
675 uint32_t f16_val = float16_val(f16); in HELPER()
676 uint32_t f16_sign = float16_is_neg(f16); in HELPER()
681 if (float16_is_any_nan(f16)) { in HELPER()
682 float16 nan = f16; in HELPER()
683 if (float16_is_signaling_nan(f16, fpst)) { in HELPER()
686 nan = float16_silence_nan(f16, fpst); in HELPER()
693 } else if (float16_is_infinity(f16)) { in HELPER()
694 return float16_set_sign(float16_zero, float16_is_neg(f16)); in HELPER()
695 } else if (float16_is_zero(f16)) { in HELPER()
[all …]
H A Dvfp.decode186 # VCVTT and VCVTB from f16: Vd format depends on size bit; Vm is always vm_sp
192 # VCVTB and VCVTT to f16: Vd format is always vd_sp;
H A Dvec_helper.c2071 static float32 float16_to_float32_by_bits(uint32_t f16, bool fz16)
2075 uint32_t sign = extract32(f16, 15, 1);
2076 uint32_t exp = extract32(f16, 10, 5);
2077 uint32_t frac = extract32(f16, 0, 10);
/qemu/tests/qapi-schema/
H A Dfeatures-too-many.json6 'f10', 'f11', 'f12', 'f13', 'f14', 'f15', 'f16', 'f17',
/qemu/target/ppc/
H A Dcpu.h341 float16 f16[8]; member
2913 #define VsrHF(i) f16[i]
2925 #define VsrHF(i) f16[7 - (i)]
/qemu/qapi/
H A Dui.json925 # @f16: since 8.0
975 … 'lang1', 'lang2','f13','f14','f15','f16','f17','f18','f19','f20','f21','f22','f23','f24' ] }