Searched refs:decoders (Results 1 – 8 of 8) sorted by relevance
115 const GPtrArray *decoders; member1242 for (guint i = 0; i < ctx->decoders->len; ++i) { in decode_opc()1243 riscv_cpu_decode_fn func = g_ptr_array_index(ctx->decoders, i); in decode_opc()1298 ctx->decoders = cpu->decoders; in riscv_tr_init_disas_context()
538 const GPtrArray *decoders; member
135 the HDM decoders which route incoming memory accesses to the145 by a generic operating system driver. They have HDM decoders216 programmable HDM decoders to route memory accesses either to219 decoders in HB0. HDM0 routes CFMW0 requests to RP0 and hence241 HDM decoders, but in this case rather than performing interleave
120 flag-style arguments don't have decoders and will show up as numbers.
5423 } decoders[] = { in disasm_inst() local5439 for (size_t i = 0; i < ARRAY_SIZE(decoders); i++) { in disasm_inst()5440 bool (*guard_func)(const RISCVCPUConfig *) = decoders[i].guard_func; in disasm_inst()5441 const rv_opcode_data *opcode_data = decoders[i].opcode_data; in disasm_inst()5442 void (*decode_func)(rv_decode *, rv_isa) = decoders[i].decode_func; in disasm_inst()
1156 cpu->decoders = dynamic_decoders; in riscv_tcg_cpu_finalize_dynamic_decoder()
153 configure the downstream Host-managed Device Memory (HDM) decoders
49 # Encoders and decoders are expected to handle those prefixes separately.155 # Since most decoders will handle the REX byte separately, the form with the