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Searched refs:decoder (Results 1 – 10 of 10) sorted by relevance

/qemu/scripts/
H A Dreplay-dump.py99 decoder = next((d for d in table if d.eid == index), None)
100 if not decoder:
102 print("Entry is: %s" % (decoder))
106 return decoder.fn(decoder.eid, decoder.name, dumpfile)
/qemu/target/i386/emulate/
H A Dx86_decode.c458 struct decode_x87_tbl *decoder; in decode_x87_ins() local
465 decoder = &_decode_tbl3[index]; in decode_x87_ins()
467 decode->cmd = decoder->cmd; in decode_x87_ins()
468 if (decoder->operand_size) { in decode_x87_ins()
469 decode->operand_size = decoder->operand_size; in decode_x87_ins()
471 decode->fpop_stack = decoder->pop; in decode_x87_ins()
472 decode->frev = decoder->rev; in decode_x87_ins()
474 if (decoder->decode_op1) { in decode_x87_ins()
475 decoder->decode_op1(env, decode, &decode->op[0]); in decode_x87_ins()
477 if (decoder->decode_op2) { in decode_x87_ins()
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/qemu/docs/system/arm/
H A Dnrf.rst38 * Quadrature decoder
/qemu/target/riscv/
H A Dxthead.decode47 # Instead of defining a new encoding, we simply use the decoder to
/qemu/docs/system/devices/
H A Dcxl.rst146 though in these EP devices, the decoder is responsible not for
160 Example system topology. x marks the match in each decoder level::
234 of the full range of possible HDM decoder configurations in this
284 | USP has HDM decoder which direct traffic to |
/qemu/docs/devel/
H A Ddecodetree.rst103 to have been already declared, typically via a second decoder.
184 The decoder will call a translator function for each pattern matched.
/qemu/target/hexagon/
H A Dmeson.build170 # Run the QEMU decodetree.py script to produce the instruction decoder
237 # Generate the trans_* functions that the decoder will use
/qemu/python/qemu/qmp/
H A Dqmp_tui.py104 except json.decoder.JSONDecodeError:
/qemu/target/i386/tcg/
H A Ddecode-new.c.inc2 * New-style decoder for i386 instructions
23 * The decoder is mostly based on tables copied from the Intel SDM. As
34 * "v" or "z" sizes. The decoder simply makes them separate operand sizes.
37 * argument). The decoder splits them into two immediates, using "Ip" for
47 * generic load and writeback, the decoder needs to know the type of the
72 * valid MMX instruction. The MMX flag directs the decoder to rewrite
87 * as "d" or "q". These have to be fixed for the decoder to work correctly.
92 * Speaking about imprecisions in the manual, the decoder treats all
139 * is complete; these are relics of the older x86 decoder and their code
146 * need any nasty hacks in the decoder, and they shouldn't get in the way
H A Demit.c.inc1690 * - s->T1: addition operand (from decoder)
1691 * - s->A0: dest address (from decoder)