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Searched refs:change_mask (Results 1 – 3 of 3) sorted by relevance

/qemu/hw/misc/
H A Dimx6_src.c155 unsigned long change_mask; in imx6_src_write() local
166 change_mask = s->regs[index] ^ (uint32_t)current_value; in imx6_src_write()
179 if (EXTRACT(change_mask, CORE3_ENABLE)) { in imx6_src_write()
190 clear_bit(CORE3_RST_SHIFT, &change_mask); in imx6_src_write()
192 if (EXTRACT(change_mask, CORE2_ENABLE)) { in imx6_src_write()
203 clear_bit(CORE2_RST_SHIFT, &change_mask); in imx6_src_write()
205 if (EXTRACT(change_mask, CORE1_ENABLE)) { in imx6_src_write()
216 clear_bit(CORE1_RST_SHIFT, &change_mask); in imx6_src_write()
218 if (EXTRACT(change_mask, CORE0_RST)) { in imx6_src_write()
222 if (EXTRACT(change_mask, CORE1_RST)) { in imx6_src_write()
[all …]
H A Dimx7_src.c172 long unsigned int change_mask; in imx7_src_write() local
183 change_mask = s->regs[index] ^ (uint32_t)current_value; in imx7_src_write()
187 if (FIELD_EX32(change_mask, CORE0, RST)) { in imx7_src_write()
191 if (FIELD_EX32(change_mask, CORE1, RST)) { in imx7_src_write()
207 if (FIELD_EX32(change_mask, CORE1, ENABLE)) { in imx7_src_write()
218 clear_bit(R_CORE1_RST_SHIFT, &change_mask); in imx7_src_write()
/qemu/hw/ssi/
H A Dimx_spi.c334 uint32_t change_mask; in imx_spi_write() local
354 change_mask = s->regs[index] ^ value; in imx_spi_write()
412 if ((value & change_mask & ECSPI_CONREG_SMC) && in imx_spi_write()
416 } else if ((value & change_mask & ECSPI_CONREG_XCH) && in imx_spi_write()