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/qemu/hw/arm/
H A Ddigic_boards.c49 static void digic4_board_init(MachineState *machine, DigicBoard *board) in digic4_board_init() argument
69 if (board->add_rom0) { in digic4_board_init()
70 board->add_rom0(s, DIGIC4_ROM0_BASE, in digic4_board_init()
71 machine->firmware ?: board->rom0_def_filename); in digic4_board_init()
74 if (board->add_rom1) { in digic4_board_init()
75 board->add_rom1(s, DIGIC4_ROM1_BASE, in digic4_board_init()
76 machine->firmware ?: board->rom1_def_filename); in digic4_board_init()
H A Dstellaris.c76 #define DEV_CAP(_dc, _cap) extract32(board->dc##_dc, DC##_dc##_##_cap, 1)
1016 static void stellaris_init(MachineState *ms, stellaris_board_info *board) in stellaris_init() argument
1079 flash_size = (((board->dc0 & 0xffff) + 1) << 1) * 1024; in stellaris_init()
1080 sram_size = ((board->dc0 >> 18) + 1) * 1024; in stellaris_init()
1116 qdev_prop_set_uint32(ssys_dev, "did0", board->did0); in stellaris_init()
1117 qdev_prop_set_uint32(ssys_dev, "did1", board->did1); in stellaris_init()
1118 qdev_prop_set_uint32(ssys_dev, "dc0", board->dc0); in stellaris_init()
1119 qdev_prop_set_uint32(ssys_dev, "dc1", board->dc1); in stellaris_init()
1120 qdev_prop_set_uint32(ssys_dev, "dc2", board->dc2); in stellaris_init()
1121 qdev_prop_set_uint32(ssys_dev, "dc3", board->dc3); in stellaris_init()
[all …]
/qemu/hw/xtensa/
H A Dxtfpga.c172 const XtfpgaBoardDesc *board, in xtfpga_flash_init() argument
180 board->flash->size / board->flash->sector_size); in xtfpga_flash_init()
181 qdev_prop_set_uint64(dev, "sector-length", board->flash->sector_size); in xtfpga_flash_init()
187 memory_region_add_subregion(address_space, board->flash->base, in xtfpga_flash_init()
223 static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) in xtfpga_init() argument
298 memory_region_add_subregion(system_memory, board->io[0], system_io); in xtfpga_init()
299 if (board->io[1]) { in xtfpga_init()
304 memory_region_add_subregion(system_memory, board->io[1], io); in xtfpga_init()
314 flash = xtfpga_flash_init(system_io, board, dinfo, TARGET_BIG_ENDIAN); in xtfpga_init()
322 board->sram_size; in xtfpga_init()
[all …]
/qemu/tests/data/qobject/
H A Dqdict.txt1943 board-1arm.c: 2699
1944 board-2430sdp.c: 5365
1945 board-3430sdp.c: 12788
1946 board-4430sdp.c: 2343
1947 board-a9m9750dev.c: 3624
1948 board-a9m9750dev.h: 478
1949 board-acs5k.c: 5495
1950 board-afeb-9260v1.c: 5234
1951 board-ams-delta.c: 6109
1952 board-ams-delta.h: 3023
[all …]
/qemu/docs/system/arm/
H A Dimx25-pdk.rst1 NXP i.MX25 PDK board (``imx25-pdk``)
4 The ``imx25-pdk`` board emulates the NXP i.MX25 Product Development Kit
5 board, which is based on an i.MX25 SoC which uses an ARM926 CPU.
H A Dstm32.rst12 - ``stm32vldiscovery`` STM32VLDISCOVERY board with STM32F100RBT6 microcontroller
17 - ``netduino2`` Netduino 2 board with STM32F205RFT6 microcontroller
23 - ``netduinoplus2`` Netduino Plus 2 board with STM32F405RGT6 microcontroller
24 - ``olimex-stm32-h405`` Olimex STM32 H405 board with STM32F405RGT6 microcontroller
25 - ``b-l475e-iot01a`` :doc:`B-L475E-IOT01A IoT Node </system/arm/b-l475e-iot01a>` board with STM…
H A Dxlnx-zcu102.rst4 The ``xlnx-zcu102`` board models the Xilinx ZynqMP ZCU102 board.
5 This board has 4 Cortex-A53 CPUs and 2 Cortex-R5F CPUs.
H A Dsbsa.rst1 Arm Server Base System Architecture Reference board (``sbsa-ref``)
4 The ``sbsa-ref`` board intends to look like real hardware (while the ``virt``
5 board is a generic board platform that doesn't match any real hardware).
21 The ``sbsa-ref`` board supports:
71 what kind of ``sbsa-ref`` board it is running on. It is neither
H A Dexynos.rst6 ``nuri`` models the Samsung NURI board.
8 ``smdkc210`` models the Samsung SMDKC210 board.
H A Dkzm.rst4 The ``kzm`` board emulates the Kyoto Microcomputer KZM-ARM11-01
5 evaluation board, which is based on an NXP i.MX32 SoC
H A Drealview.rst8 Kernels for the PB-A8 board should have CONFIG_REALVIEW_HIGH_PHYS_OFFSET
9 enabled in the kernel, and expect 512M RAM. Kernels for The PBX-A9 board
H A Dxlnx-zynq.rst1 Xilinx Zynq board (``xilinx-zynq-a9``)
10 QEMU xilinx-zynq-a9 board supports following devices:
H A Dmcimx6ul-evk.rst5 MCIMX6UL-EVK development board. It has a single Cortex-A7 CPU.
/qemu/docs/system/
H A Dtarget-mips.rst11 - The MIPS Malta prototype board \"malta\"
15 - MIPS emulator pseudo board \"mipssim\"
22 - Core board with MIPS 24Kf CPU and Galileo system controller
34 The Boston board emulation supports the following devices:
83 The mipssim pseudo board emulation provides an environment similar to
112 Start system emulation of Malta board with nanoMIPS I7200 CPU::
H A Dtarget-xtensa.rst10 - Xtensa emulator pseudo board \"sim\"
12 - Avnet LX60/LX110/LX200 board
14 The sim pseudo board emulation provides an environment similar to one
H A Dtarget-openrisc.rst17 Choosing a board model
20 For QEMU's OpenRISC system emulation, you must specify which board model you
34 help`` output. If it is listed, then you can probably use that board model. If
41 and just want to run Linux, the best option is to use the ``virt`` board. This
44 configuration for running on the ``virt`` board. ``virt`` supports PCI, virtio
H A Dtarget-riscv.rst20 special cases like the ``virt`` board.
22 Choosing a board model
25 For QEMU's RISC-V system emulation, you must specify which board
39 use that board model. If it is not listed, then unfortunately your image
47 ``virt`` board. This is a platform which doesn't correspond to any
50 the ``virt`` board. ``virt`` supports PCI, virtio, recent CPUs and
H A Dtarget-arm.rst30 by hand, except for special cases like the ``virt`` board.
32 Choosing a board model
35 For QEMU's Arm system emulation, you must specify which board
49 use that board model. If it is not listed, then unfortunately your image
57 ``virt`` board. This is a platform which doesn't correspond to any
60 the ``virt`` board. ``virt`` supports PCI, virtio, recent CPUs and
/qemu/docs/system/openrisc/
H A Dor1k-sim.rst1 Or1ksim board
4 The QEMU Or1ksim machine emulates the standard OpenRISC board simulator which is
37 The ``or1k-sim`` board automatically generates a device tree blob ("dtb")
H A Dvirt.rst4 The ``virt`` board is a platform which does not correspond to any
6 It is the recommended board type if you simply want to run
45 The ``virt`` board automatically generates a device tree blob ("dtb") which it
/qemu/docs/system/riscv/
H A Dmicroblaze-v-generic.rst1 Microblaze-V generic board (``amd-microblaze-v-generic``)
12 The MicroBlaze™ V generic board in QEMU has following supported devices:
32 (xilinx_mbv32_defconfig) on the Microblaze-V generic board.
/qemu/hw/isa/
H A DKconfig41 # For historical reasons, SuperIO devices are created in the board
72 # For historical reasons, SuperIO devices are created in the board
/qemu/docs/system/ppc/
H A Damigang.rst13 which is a rebranded Mai Logic Teron board with modified U-Boot
86 The Pegasos II board has an Open Firmware compliant ROM based on
127 The ``sam460ex`` machine emulates the Sam460ex board by aCube which is
134 The board has a firmware based on an older U-Boot version with
143 * Silicon Motion SM501 display parts (identical to SM502 on real board)
/qemu/hw/virtio/
H A DKconfig54 # selected by the board if it has the required support code
66 # selected by the board if it has the required support code
/qemu/docs/system/devices/
H A Dcan.rst38 (1) CAN bus Kvaser PCI CAN-S (single SJA1000 channel) board. QEMU startup options::
62 The ''kvaser_pci'' board/device model is compatible with and has been tested with
112 The PCIe board emulation is provided for now (the device identifier is
114 on the board.
189 …(11) `Integration with PCIe interfacing for Intel/Altera Cyclone IV based board <https://gitlab.fe…

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