| /qemu/target/hexagon/idef-parser/ |
| H A D | parser-helpers.c | 142 switch (reg->bit_width) { in reg_compose()
181 if (rvalue->bit_width == 32) { in imm_print()
187 } else if (rvalue->bit_width == 64) { in imm_print()
273 static void gen_c_int_type(Context *c, YYLTYPE *locp, unsigned bit_width, in gen_c_int_type() argument
277 OUT(c, locp, signstr, "int", &bit_width, "_t"); in gen_c_int_type()
283 unsigned bit_width, in gen_constant() argument
287 assert(bit_width == 32 || bit_width == 64); in gen_constant()
290 rvalue.bit_width = bit_width; in gen_constant()
294 OUT(c, locp, "TCGv_i", &bit_width, " tmp_", &c->inst.tmp_count, in gen_constant()
295 " = tcg_constant_i", &bit_width, "(", value, ");\n"); in gen_constant()
[all …]
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| H A D | idef-parser.h | 55 unsigned bit_width; /**< Bit width of the reg, 32 or 64 bits */ member
109 unsigned bit_width; /**< Bit width of the cast operator */ member
117 unsigned bit_width; /**< Bit width of the extract operator */ member
149 uint8_t bit_width; /**< Bit width of the VARID variable */ member
174 unsigned bit_width; /**< Bit width of the rvalue */ member
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| H A D | idef-parser.y | 169 yyassert(c, &@1, $1.bit_width <= 64,
176 $$.bit_width = 32;
181 $$.bit_width = 32;
186 $$.bit_width = 64;
211 gen_varid_allocate(c, &@1, &$2, $1.bit_width, $1.signedness);
216 $$.bit_width = $1.bit_width;
489 rvalue.bit_width = 32;
595 $$ = gen_cast_op(c, &@1, &$2, $1.bit_width, $1.signedness);
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| H A D | parser-helpers.h | 152 unsigned bit_width,
158 unsigned bit_width,
161 HexValue gen_imm_qemu_tmp(Context *c, YYLTYPE *locp, unsigned bit_width,
173 unsigned bit_width,
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| H A D | README.rst | 343 (``unsigned bit_width``) and its signedness (``HexSignedness signedness``).
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| /qemu/hw/i386/ |
| H A D | acpi-microvm.c | 165 .bit_width = 8, in acpi_build_microvm()
170 .bit_width = 8, in acpi_build_microvm()
177 .bit_width = 8, in acpi_build_microvm()
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| H A D | acpi-build.c | 132 .bit_width = NVDIMM_ACPI_IO_LEN << 3
176 .pm1a_evt = { .space_id = as, .bit_width = 4 * 8, .address = io }, in init_common_fadt_data()
177 .pm1a_cnt = { .space_id = as, .bit_width = 2 * 8, in init_common_fadt_data()
179 .pm_tmr = { .space_id = as, .bit_width = 4 * 8, .address = io + 0x08 }, in init_common_fadt_data()
180 .gpe0_blk = { .space_id = as, .bit_width = in init_common_fadt_data()
218 .bit_width = 8, .address = ICH9_RST_CNT_IOPORT }; in acpi_get_pm_info()
1648 pm->fadt.gpe0_blk.bit_width / 8) in build_dsdt()
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| /qemu/include/hw/acpi/ |
| H A D | acpi-defs.h | 53 uint8_t bit_width; /* Size in bits of given register */ member
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| H A D | aml-build.h | 466 uint8_t bit_width, uint8_t bit_offset,
472 build_append_gas(table, s->space_id, s->bit_width, s->bit_offset, in build_append_gas_from_struct()
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| /qemu/hw/loongarch/ |
| H A D | virt-acpi-build.c | 78 .bit_width = 8, in init_common_fadt_data()
83 .bit_width = 8, in init_common_fadt_data()
90 .bit_width = 8, in init_common_fadt_data()
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| /qemu/hw/acpi/ |
| H A D | aml-build.c | 408 uint8_t bit_width, uint8_t bit_offset, in build_append_gas() argument
412 build_append_int_noprefix(table, bit_width, 1); in build_append_gas()
2268 build_append_int_noprefix(tbl, f->pm1a_evt.bit_width / 8, 1); in build_fadt()
2270 build_append_int_noprefix(tbl, f->pm1a_cnt.bit_width / 8, 1); in build_fadt()
2272 build_append_int_noprefix(tbl, f->pm_tmr.bit_width / 8, 1); /* PM_TMR_LEN */ in build_fadt()
2274 build_append_int_noprefix(tbl, f->gpe0_blk.bit_width / 8, 1); in build_fadt()
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| H A D | nvdimm.c | 901 "nvdimm-acpi-io", dsm_io.bit_width >> 3); in nvdimm_init_acpi_state()
960 nvdimm_state->dsm_io.bit_width >> 3)); in nvdimm_build_common_dsm()
975 nvdimm_state->dsm_io.bit_width)); in nvdimm_build_common_dsm()
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| H A D | erst.c | 216 gas.bit_width = e->register_bit_width; in build_serialization_instruction()
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| /qemu/hw/arm/ |
| H A D | virt.c | 2428 .bit_width = NVDIMM_ACPI_IO_LEN << 3 in machvirt_init()
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