Searched refs:bare (Results 1 – 15 of 15) sorted by relevance
87 Nuvoton NPCM7xx/8xx BMC devices. It currently implements the bare minimum to93 ASPEED AST27x0 BMC SOC. It currently implements the bare minimum to
203 access to the bare metal hardware directly. Although POWER7 had this capability,207 Power bare metal). Although it runs on a PowerNV platform, it can only be used232 | PowerNV | bare metal | 32 | hash | no | yes |
4 PowerNV (as Non-Virtualized) is the "bare metal" platform using the
232 Hardware configuration information for bare-metal programming256 - For guests booting as "bare-metal" (any other kind of boot),
1110 RISCV_CPU(obj)->cfg.ext_zicntr = !mcc->def->bare; in riscv_cpu_init()1111 RISCV_CPU(obj)->cfg.ext_zihpm = !mcc->def->bare; in riscv_cpu_init()2713 mcc->def->bare |= def->bare; in riscv_cpu_class_base_init()2716 assert(mcc->def->bare); in riscv_cpu_class_base_init()2907 .bare = true,
550 bool bare; member
75 # Prefer pylint's bare-except checks to flake8's
38 storage backend for virtual machines (as it is now for bare metal
29 is weird anyway since it cannot be done for "bare metal".
109 have a full libc to be run as "bare-metal" code under QEMU's user-mode
13 one-shot fix, the bare minimum we ask is that:
988 either totally bare with minimal gcc lib support (for system-mode tests)
2497 Websocket connections. If a bare websocket option is given, the4180 guest address space and used mostly for ``bare metal`` type5153 bare-metal test case code).
1078 eliminated bare ADDIS, so we know both insns are required. */