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Searched refs:andn (Results 1 – 10 of 10) sorted by relevance

/qemu/tests/tcg/tricore/c/
H A Dcrt0-tc2x.S77 andn %d0,%d0,0x80 # clear CDE bit
110 andn %d0,%d0,0x100 # clear GW bit
166 andn %d0,%d0,63
169 andn %d2,%d2,63 #; force alignment (2^6)
/qemu/tests/tcg/i386/
H A Dtest-i386-bmi2.c47 insn2q(andn, clear, "rm", val, "r")
60 insn2l(andn, clear, "rm", val, "r") in insn1q()
/qemu/target/microblaze/
H A Dinsns.decode79 andn 100011 ..... ..... ..... 000 0000 0000 @typea
H A Dtranslate.c327 DO_TYPEA(andn, false, tcg_gen_andc_i32) in DO_TYPEA()
/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_arith.c.inc271 TRANS(andn, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_andc_tl)
/qemu/disas/
H A Dmicroblaze.c105 …andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, wic, wdc, wdcclear, wdcflush, … enumerator
330 …O_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000000, OPCODE_MASK_H4, andn, logical_inst },
/qemu/target/riscv/
H A Dinsn32.decode770 andn 0100000 .......... 111 ..... 0110011 @r
/qemu/target/loongarch/
H A Dinsns.decode121 andn 0000 00000001 01101 ..... ..... ..... @rrr
H A Ddisas.c399 INSN(andn, rrr) in INSN()
/qemu/tcg/loongarch64/
H A Dtcg-insn-defs.c.inc1486 /* Emits the `andn d, j, k` instruction. */