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Searched refs:ah (Results 1 – 22 of 22) sorted by relevance

/qemu/tests/tcg/i386/
H A Dtest-i386-vm86.S9 movb $0x09, %ah
24 movb $0x09, %ah
29 movb $0xff, %ah
35 movb $0xff, %ah
41 movb $0xff, %ah
46 movb $0x09, %ah
59 movb $0xff, %ah
69 movb $0xff, %ah
72 movb $0x00, %ah
78 movb $0xff, %ah
[all …]
H A Dtest-i386.c1655 int int_num, ah, v; in test_vm86() local
1660 ah = (r->eax >> 8) & 0xff; in test_vm86()
1661 switch(ah) { in test_vm86()
/qemu/target/i386/tcg/
H A Dint_helper.c149 int ah; in helper_aam() local
152 ah = al / base; in helper_aam()
154 return al | (ah << 8); in helper_aam()
159 int al, ah; in helper_aad() local
162 ah = (ax >> 8) & 0xff; in helper_aad()
163 al = ((ah * base) + al) & 0xff; in helper_aad()
170 int al, ah, af; in helper_aaa() local
176 ah = (env->regs[R_EAX] >> 8) & 0xff; in helper_aaa()
181 ah = (ah + 1 + icarry) & 0xff; in helper_aaa()
187 env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | al | (ah << 8); in helper_aaa()
[all …]
/qemu/target/s390x/tcg/
H A Dint_helper.c89 Int128 HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t b) in HELPER()
92 uint64_t r = divu128(&al, &ah, b); in HELPER()
93 if (ah == 0) { in HELPER()
H A Dtranslate_vx.c.inc255 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
261 TCGv_i64 ah = tcg_temp_new_i64();
266 read_vec_element_i64(ah, a, 0, ES_64);
270 fn(dl, dh, al, ah, bl, bh);
276 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh,
283 TCGv_i64 ah = tcg_temp_new_i64();
290 read_vec_element_i64(ah, a, 0, ES_64);
296 fn(dl, dh, al, ah, bl, bh, cl, ch);
301 static void gen_addi2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al, TCGv_i64 ah,
307 tcg_gen_add2_i64(dl, dh, al, ah, bl, bh);
[all …]
/qemu/target/alpha/
H A Dint_helper.c65 uint64_t al, ah, bl, bh, cl, ch; in helper_cmpbge() local
70 ah = (a >> 8) & mask; in helper_cmpbge()
76 ch = ((ah | test) - bh) & test; in helper_cmpbge()
/qemu/tcg/
H A Dtcg-op.c1052 void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah, in tcg_gen_extract2_i32() argument
1059 tcg_gen_mov_i32(ret, ah); in tcg_gen_extract2_i32()
1060 } else if (al == ah) { in tcg_gen_extract2_i32()
1063 tcg_gen_op4i_i32(INDEX_op_extract2, ret, al, ah, ofs); in tcg_gen_extract2_i32()
1067 tcg_gen_deposit_i32(ret, t0, ah, 32 - ofs, ofs); in tcg_gen_extract2_i32()
1085 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh) in tcg_gen_add2_i32() argument
1090 tcg_gen_op3_i32(INDEX_op_addci, rh, ah, bh); in tcg_gen_add2_i32()
1098 tcg_gen_add_i32(rh, ah, bh); in tcg_gen_add2_i32()
1134 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh) in tcg_gen_sub2_i32() argument
1139 tcg_gen_op3_i32(INDEX_op_subbi, rh, ah, bh); in tcg_gen_sub2_i32()
[all …]
H A Doptimize.c835 TCGArg al, ah, bl, bh; in do_constant_folding_cond2() local
847 ah = args[1]; in do_constant_folding_cond2()
856 if (arg_is_const(al) && arg_is_const(ah)) { in do_constant_folding_cond2()
858 tcg_target_ulong ahv = arg_info(ah)->val; in do_constant_folding_cond2()
896 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) { in do_constant_folding_cond2()
921 op2->args[1] = ah; in do_constant_folding_cond2()
H A Dtcg-op-vec.c239 TCGArg ah = tcgv_i32_arg(TCGV_HIGH(a)); in tcg_gen_dup_i64_vec() local
240 vec_gen_3(INDEX_op_dup2_vec, type, MO_64, ri, al, ah); in tcg_gen_dup_i64_vec()
H A Dtcg.c1014 void (*out)(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
1099 void (*out)(TCGContext *s, TCGCond cond, TCGReg ret, TCGReg al, TCGReg ah,
/qemu/include/tcg/
H A Dtcg-op-common.h121 void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah,
136 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
138 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
226 void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al, TCGv_i64 ah,
241 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
243 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc198 TCGv al, TCGv ah, TCGv bl, TCGv bh,
208 tcg_gen_or_tl(rl, al, ah);
211 tcg_gen_xor_tl(rh, ah, bh);
219 tcg_gen_mov_tl(rl, ah);
223 tcg_gen_sub2_tl(rl, rh, al, ah, bl, bh);
224 tcg_gen_xor_tl(rl, rh, ah);
225 tcg_gen_xor_tl(tmp, ah, bh);
244 tcg_gen_sub2_tl(tmp, rh, ah, one, tmp, zero);
H A Dtrans_rvm.c.inc27 static void gen_mulhu_i128(TCGv r2, TCGv r3, TCGv al, TCGv ah, TCGv bl, TCGv bh)
39 tcg_gen_mulu2_tl(tmpl, tmph, ah, bl);
46 tcg_gen_mulu2_tl(tmpl, tmph, ah, bh);
/qemu/target/ppc/translate/
H A Dvmx-impl.c.inc995 TCGv_i64 ah, al, vrb, n, t0, t1, zero = tcg_constant_i64(0);
1000 ah = tcg_temp_new_i64();
1007 get_avr64(ah, a->vra, true);
1011 tcg_gen_mov_i64(t0, ah);
1013 tcg_gen_movcond_i64(TCG_COND_NE, ah, t1, zero, al, ah);
1017 tcg_gen_shl_i64(t0, ah, n);
1026 tcg_gen_shr_i64(ah, ah, n);
1027 tcg_gen_shri_i64(ah, ah, 1);
1028 tcg_gen_or_i64(t1, ah, t1);
1034 do_vrlq_mask(ah, al, vrb, n);
[all …]
/qemu/target/arm/tcg/
H A Dvfp_helper.c75 static inline uint32_t vfp_exceptbits_from_host(int host_bits, bool ah) in vfp_exceptbits_from_host() argument
101 if (ah && (host_bits & float_flag_input_denormal_used)) { in vfp_exceptbits_from_host()
104 if (ah && (host_bits & float_flag_output_denormal_flushed)) { in vfp_exceptbits_from_host()
/qemu/tcg/tci/
H A Dtcg-target.c.inc1050 static void tgen_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
1055 al, ah, bl, bh, cond);
1068 TCGReg al, TCGReg ah,
1072 tcg_out_op_rrrrrc(s, INDEX_op_setcond2_i32, ret, al, ah, bl, bh, cond);
/qemu/tcg/mips/
H A Dtcg-target.c.inc930 TCGReg al, TCGReg ah, TCGReg bl, TCGReg bh)
941 tcg_out_opc_reg(s, OPC_XOR, TCG_TMP1, ah, bh);
946 tgen_setcond(s, TCG_TYPE_I32, TCG_COND_EQ, TCG_TMP0, ah, bh);
950 tgen_setcond(s, TCG_TYPE_I32, tcg_high_cond(cond), TCG_TMP0, ah, bh);
958 TCGReg al, TCGReg ah,
962 int tmpflags = tcg_out_setcond2_int(s, cond, ret, al, ah, bl, bh);
974 static void tgen_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
978 int tmpflags = tcg_out_setcond2_int(s, cond, TCG_TMP0, al, ah, bl, bh);
/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_vec.c.inc357 TCGv_i64 rh, rl, ah, al, bh, bl;
365 ah = tcg_temp_new_i64();
371 get_vreg64(ah, a->vj, 1 + i * 2);
376 func(rl, rh, al, ah, bl, bh);
4745 TCGv_i64 t1, al, ah; \
4748 ah = tcg_temp_new_i64(); \
4751 get_vreg64(ah, a->vj, 1); \
4762 tcg_gen_or_i64(t1, al, ah); \
5277 TCGv_i64 ah, al;
5289 ah = tcg_temp_new_i64();
[all …]
/qemu/tcg/arm/
H A Dtcg-target.c.inc1204 static TCGCond tcg_out_cmp2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
1219 tcg_out_dat_rI(s, COND_AL, ARITH_CMP, 0, ah, bh, const_bh);
1226 tcg_out_dat_rI(s, COND_AL, ARITH_TST, 0, ah, bh, const_bh);
1238 TCG_REG_TMP, ah, bh, const_bh);
1247 TCG_REG_TMP, ah, bh, const_bh);
2501 static void tgen_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
2505 cond = tcg_out_cmp2(s, cond, al, ah, bl, const_bl, bh, const_bh);
2515 TCGReg al, TCGReg ah,
2519 cond = tcg_out_cmp2(s, cond, al, ah, bl, const_bl, bh, const_bh);
/qemu/tcg/i386/
H A Dtcg-target.c.inc1672 TCGReg ah, TCGArg bl, bool blconst,
1683 tcg_out_brcond(s, 0, cond, ah, bh, bhconst, label_this, small);
1689 tcg_out_brcond(s, 0, cond, ah, bh, bhconst, label_this, small);
1694 ah, bh, bhconst, label_this, small);
1704 TCGReg ah, TCGArg bl, bool blconst,
1707 tcg_out_brcond2(s, cond, al, ah, bl, blconst, bh, bhconst, l, false);
1870 TCGReg al, TCGReg ah,
1876 if (ret == al || ret == ah
1885 tcg_out_brcond2(s, cond, al, ah, bl, const_bl,
1901 tcg_out_brcond2(s, tcg_invert_cond(cond), al, ah, bl, const_bl,
/qemu/tcg/ppc/
H A Dtcg-target.c.inc2120 static void tcg_out_cmp2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
2145 tcg_out_cmp(s, cond, ah, bh, bhconst, 7, TCG_TYPE_I32);
2157 tcg_out_andi32(s, TCG_REG_TMP1, ah, bh);
2159 tcg_out32(s, AND | SAB(ah, TCG_REG_TMP1, bh));
2177 tcg_out_cmp(s, cond, ah, bh, bhconst, 6, TCG_TYPE_I32);
2189 TCGReg al, TCGReg ah,
2193 tcg_out_cmp2(s, cond, al, ah, bl, const_bl, bh, const_bh);
2206 static void tgen_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah,
2211 tcg_out_cmp2(s, cond, al, ah, bl, const_bl, bh, const_bh);
/qemu/tests/data/qobject/
H A Dqdict.txt582 ah.c: 3493
584 ah.h: 894