Searched refs:addc (Results 1 – 7 of 7) sorted by relevance
| /qemu/target/microblaze/ |
| H A D | insns.decode | 67 addc 000010 ..... ..... ..... 000 0000 0000 @typea
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| H A D | translate.c | 311 DO_TYPEA(addc, true, gen_addc) in DO_TYPEA()
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| /qemu/target/openrisc/ |
| H A D | disas.c | 61 INSN(addc, "r%d, r%d, r%d", a->d, a->a, a->b)
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| /qemu/target/hppa/ |
| H A D | translate.c | 2982 TCGv_i64 dest, add1, add2, addc, in1, in2; in trans_ds() local
2991 addc = tcg_temp_new_i64(); in trans_ds()
3004 tcg_gen_sextract_i64(addc, cpu_psw_v, 31, 1); in trans_ds()
3005 tcg_gen_xor_i64(add2, in2, addc); in trans_ds()
3006 tcg_gen_andi_i64(addc, addc, 1); in trans_ds()
3008 tcg_gen_addcio_i64(dest, cpu_psw_cb_msb, add1, add2, addc); in trans_ds()
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| /qemu/disas/ |
| H A D | microblaze.c | 101 add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, cmp, cmpu, enumerator
290 …FFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000000, OPCODE_MASK_H4, addc, arithmetic_inst },
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| /qemu/target/mips/tcg/ |
| H A D | mxu_translate.c | 3422 uint32_t aptn2, addc, XRc, XRb, XRa, XRd; in gen_mxu_d32add() local
3425 addc = extract32(ctx->opcode, 22, 2); in gen_mxu_d32add()
3436 if (unlikely(addc > 1)) { in gen_mxu_d32add()
3438 } else if (addc == 1) { in gen_mxu_d32add()
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| /qemu/docs/devel/ |
| H A D | tcg-ops.rst | 630 identical to the borrow bit. Thus the addc\* and subb\*
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