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Searched refs:VM_1_10_SV32 (Results 1 – 5 of 5) sorted by relevance

/qemu/target/riscv/
H A Dmonitor.c165 case VM_1_10_SV32: in mem_info_svxx()
H A Dcpu.c377 return VM_1_10_SV32; in satp_mode_from_str()
420 case VM_1_10_SV32: in satp_mode_str()
2730 mcc->def->cfg.max_satp_mode = VM_1_10_SV32; in riscv_cpu_class_base_init()
2918 .cfg.max_satp_mode = VM_1_10_SV32,
2927 .cfg.max_satp_mode = VM_1_10_SV32,
2957 .cfg.max_satp_mode = VM_1_10_SV32,
3001 .cfg.max_satp_mode = VM_1_10_SV32,
H A Dcpu_bits.h660 #define VM_1_10_SV32 1 macro
H A Dcpu_helper.c1268 case VM_1_10_SV32: in get_physical_address()
1303 if (vm != VM_1_10_SV32 && addr >> va_bits != 0) { in get_physical_address()
H A Dcsr.c1832 [VM_1_10_SV32] = true