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Searched refs:TM_NSR_GRP_LVL (Results 1 – 2 of 2) sorted by relevance

/qemu/include/hw/ppc/
H A Dxive_regs.h163 #define TM_NSR_GRP_LVL PPC_BITMASK8(2, 7) macro
/qemu/hw/intc/
H A Dxive.c70 if (regs[TM_NSR] & TM_NSR_GRP_LVL) { in xive_tctx_accept()
71 regs[TM_NSR] &= ~TM_NSR_GRP_LVL; in xive_tctx_accept()