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Searched refs:SC (Results 1 – 8 of 8) sorted by relevance

/qemu/hw/audio/
H A Dfmopl.c167 #define SC(db) (db*((3/EG_STEP)*(1<<ENV_BITS)))+EG_DST macro
169 SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
170 SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
172 #undef SC
/qemu/target/riscv/insn_trans/
H A Dtrans_rva.c.inc44 * TSO defines AMOs as acquire+release-RCsc, but does not define LR/SC as
69 * Note that the TCG atomic primitives are SC,
91 * Clear the load reservation, since an SC must fail if there is
92 * an SC to any address, in between an LR and SC pair.
/qemu/target/mips/tcg/
H A Drel6.decode48 REMOVED 111000 ----- ----- ---------------- # SC
H A Dmicromips_translate.c.inc347 SC = 0xb,
2573 case SC:
H A Dnanomips_translate.c.inc924 /* P.SC instruction pool */
/qemu/docs/specs/
H A Dppc-xive.rst23 (SC). These are found in PCI PHBs, in the Processor Service
45 | |SC end | | | | nvt | | | |
/qemu/target/ppc/translate/
H A Dmisc-impl.c.inc47 * older processors. It also added the SC field, zero this to ignore
/qemu/disas/
H A Dnanomips.c12603 static char *SC(uint64 instruction, Dis_info *info) in SC() function
20923 0xfc007f03, 0xa4005900, &SC , 0,