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Searched refs:RVM (Results 1 – 7 of 7) sorted by relevance

/qemu/target/riscv/insn_trans/
H A Dtrans_rvm.c.inc22 if (!ctx->cfg_ptr->ext_zmmul && !has_ext(ctx, RVM)) { \
208 REQUIRE_EXT(ctx, RVM);
240 REQUIRE_EXT(ctx, RVM);
285 REQUIRE_EXT(ctx, RVM);
318 REQUIRE_EXT(ctx, RVM);
333 REQUIRE_EXT(ctx, RVM);
341 REQUIRE_EXT(ctx, RVM);
349 REQUIRE_EXT(ctx, RVM);
357 REQUIRE_EXT(ctx, RVM);
373 REQUIRE_EXT(ctx, RVM);
[all …]
/qemu/target/riscv/
H A Dcpu.c43 const uint32_t misa_bits[] = {RVI, RVE, RVM, RVA, RVF, RVD, RVV,
1163 MISA_EXT_INFO(RVM, "m", "Integer multiplication and division"),
2010 .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVB | RVU,
2146 .ext = RVM,
2935 .misa_ext = RVI | RVM | RVA | RVC | RVU,
2944 .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU,
2963 .misa_ext = RVI | RVM | RVC | RVU,
H A Dcpu.h61 #define RVM RV('M') macro
H A Dcsr.c2143 if (!(val & RVI && val & RVM && val & RVA && in write_misa()
/qemu/target/riscv/tcg/
H A Dtcg-cpu.c506 uint32_t g_misa_bits[] = {RVI, RVM, RVA, RVF, RVD}; in riscv_cpu_validate_g()
1286 MISA_CFG(RVM, true),
/qemu/target/riscv/kvm/
H A Dkvm-cpu.c154 KVM_MISA_CFG(RVM, KVM_RISCV_ISA_EXT_M),
/qemu/linux-user/
H A Dsyscall.c9031 riscv_has_ext(env, RVM) && in risc_hwprobe_fill_pairs()