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Searched refs:RISCV_IOMMU_IPSR_PIP (Results 1 – 2 of 2) sorted by relevance

/qemu/hw/riscv/
H A Driscv-iommu-bits.h191 #define RISCV_IOMMU_IPSR_PIP BIT(3) macro
H A Driscv-iommu.c2011 if (data & RISCV_IOMMU_IPSR_PIP) { in riscv_iommu_update_ipsr()
2017 ipsr_set |= RISCV_IOMMU_IPSR_PIP; in riscv_iommu_update_ipsr()
2019 ipsr_clr |= RISCV_IOMMU_IPSR_PIP; in riscv_iommu_update_ipsr()
2022 ipsr_clr |= RISCV_IOMMU_IPSR_PIP; in riscv_iommu_update_ipsr()