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Searched refs:RISCV_IOMMU_FQCSR_FIE (Results 1 – 4 of 4) sorted by relevance

/qemu/tests/qtest/libqos/
H A Driscv-iommu.h53 #define RISCV_IOMMU_FQCSR_FIE RISCV_IOMMU_QUEUE_INTR_ENABLE macro
/qemu/tests/qtest/
H A Driscv-iommu-test.c72 g_assert_cmpuint(reg & RISCV_IOMMU_FQCSR_FIE, ==, 0); in test_reg_reset()
/qemu/hw/riscv/
H A Driscv-iommu-bits.h172 #define RISCV_IOMMU_FQCSR_FIE RISCV_IOMMU_QUEUE_INTR_ENABLE macro
H A Driscv-iommu.c140 if (ctrl & RISCV_IOMMU_FQCSR_FIE) { in riscv_iommu_fault()
2000 if (fqcsr & RISCV_IOMMU_FQCSR_FIE && in riscv_iommu_update_ipsr()
2482 reg_clr = RISCV_IOMMU_FQCSR_FQEN | RISCV_IOMMU_FQCSR_FIE | in riscv_iommu_reset()