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Searched refs:RISCV_IOMMU_DC_FSC_MODE_BARE (Results 1 – 2 of 2) sorted by relevance

/qemu/hw/riscv/
H A Driscv-iommu-bits.h369 RISCV_IOMMU_DC_FSC_MODE_BARE = 0, enumerator
H A Driscv-iommu.c273 en_s = satp != RISCV_IOMMU_DC_FSC_MODE_BARE; in riscv_iommu_spa_fetch()
831 case RISCV_IOMMU_DC_FSC_MODE_BARE: in riscv_iommu_validate_process_ctx()
897 RISCV_IOMMU_DC_FSC_MODE_BARE); in riscv_iommu_ctx_fetch()
1021 if (mode == RISCV_IOMMU_DC_FSC_MODE_BARE) { in riscv_iommu_ctx_fetch()
1403 if (satp == RISCV_IOMMU_DC_FSC_MODE_BARE) { in riscv_iommu_get_transtag()