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Searched refs:RISCV_IOMMU_CQCSR_CQON (Results 1 – 4 of 4) sorted by relevance

/qemu/tests/qtest/libqos/
H A Driscv-iommu.h48 #define RISCV_IOMMU_CQCSR_CQON RISCV_IOMMU_QUEUE_ACTIVE macro
/qemu/tests/qtest/
H A Driscv-iommu-test.c67 g_assert_cmpuint(reg & RISCV_IOMMU_CQCSR_CQON, ==, 0); in test_reg_reset()
/qemu/hw/riscv/
H A Driscv-iommu.c1648 if (!(ctrl & RISCV_IOMMU_CQCSR_CQON) || in riscv_iommu_process_cq_tail()
1823 bool active = !!(ctrl_set & RISCV_IOMMU_CQCSR_CQON); in riscv_iommu_process_cq_control()
1832 ctrl_set = RISCV_IOMMU_CQCSR_CQON; in riscv_iommu_process_cq_control()
1839 ctrl_clr = RISCV_IOMMU_CQCSR_BUSY | RISCV_IOMMU_CQCSR_CQON; in riscv_iommu_process_cq_control()
2397 stl_le_p(&s->regs_ro[RISCV_IOMMU_REG_CQCSR], RISCV_IOMMU_CQCSR_CQON | in riscv_iommu_realize()
2479 RISCV_IOMMU_CQCSR_CQON | RISCV_IOMMU_CQCSR_BUSY; in riscv_iommu_reset()
H A Driscv-iommu-bits.h166 #define RISCV_IOMMU_CQCSR_CQON RISCV_IOMMU_QUEUE_ACTIVE macro