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Searched refs:RISCV_IMPLIED_EXTS_RULE_END (Results 1 – 3 of 3) sorted by relevance

/qemu/target/riscv/
H A Dcpu.c2123 RISCV_IMPLIED_EXTS_RULE_END
2131 .implied_multi_exts = { RISCV_IMPLIED_EXTS_RULE_END },
2140 RISCV_IMPLIED_EXTS_RULE_END
2150 RISCV_IMPLIED_EXTS_RULE_END
2160 RISCV_IMPLIED_EXTS_RULE_END
2169 RISCV_IMPLIED_EXTS_RULE_END
2179 RISCV_IMPLIED_EXTS_RULE_END
2189 RISCV_IMPLIED_EXTS_RULE_END
2199 RISCV_IMPLIED_EXTS_RULE_END
2208 RISCV_IMPLIED_EXTS_RULE_END
[all …]
H A Dcpu.h158 #define RISCV_IMPLIED_EXTS_RULE_END -1 macro
/qemu/target/riscv/tcg/
H A Dtcg-cpu.c1025 rule->implied_multi_exts[i] != RISCV_IMPLIED_EXTS_RULE_END; i++) { in cpu_enable_implied_rule()