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Searched refs:QEMU_ALIGNED (Results 1 – 23 of 23) sorted by relevance

/qemu/target/hexagon/
H A Dcpu.h57 DECLARE_BITMAP(mask, MAX_VEC_SIZE_BYTES) QEMU_ALIGNED(16);
58 MMVector data QEMU_ALIGNED(16);
95 MMVector VRegs[NUM_VREGS] QEMU_ALIGNED(16);
96 MMVector future_VRegs[VECTOR_TEMPS_MAX] QEMU_ALIGNED(16);
97 MMVector tmp_VRegs[VECTOR_TEMPS_MAX] QEMU_ALIGNED(16);
99 MMQReg QRegs[NUM_QREGS] QEMU_ALIGNED(16);
100 MMQReg future_QRegs[NUM_QREGS] QEMU_ALIGNED(16);
103 MMVectorPair VuuV QEMU_ALIGNED(16);
104 MMVectorPair VvvV QEMU_ALIGNED(16);
105 MMVectorPair VxxV QEMU_ALIGNED(16);
[all …]
/qemu/tests/bench/
H A Datomic64-bench.c15 } QEMU_ALIGNED(64);
19 } QEMU_ALIGNED(64);
H A Datomic_add-bench.c9 } QEMU_ALIGNED(64);
14 } QEMU_ALIGNED(64);
H A Dqht-bench.c38 } QEMU_ALIGNED(64); /* avoid false sharing among threads */
/qemu/include/qemu/
H A Dwin_dump_defs.h176 } QEMU_ALIGNED(16) WinM128A;
210 } QEMU_ALIGNED(16) WinContext32;
279 } QEMU_ALIGNED(16) WinContext64;
H A Dcompiler.h26 #define QEMU_ALIGNED(X) __attribute__((aligned(X))) macro
/qemu/linux-user/loongarch64/
H A Dsignal.c24 abi_ulong sc_extcontext[0] QEMU_ALIGNED(16);
39 } QEMU_ALIGNED(FPU_CTX_ALIGN);
50 } QEMU_ALIGNED(LSX_CTX_ALIGN);
58 } QEMU_ALIGNED(LASX_CTX_ALIGN);
65 } QEMU_ALIGNED(CONTEXT_INFO_ALIGN);
/qemu/include/exec/
H A Dtlb-common.h54 } CPUTLBDescFast QEMU_ALIGNED(2 * sizeof(void *)); typedef
/qemu/include/net/
H A Dcan_emu.h50 uint8_t data[64] QEMU_ALIGNED(8);
/qemu/include/hw/loongarch/
H A Dboot.h22 } efi_guid_t QEMU_ALIGNED(8); typedef
/qemu/subprojects/libvduse/include/
H A Dcompiler.h26 #define QEMU_ALIGNED(X) __attribute__((aligned(X))) macro
/qemu/subprojects/libvhost-user/include/
H A Dcompiler.h26 #define QEMU_ALIGNED(X) __attribute__((aligned(X))) macro
/qemu/linux-user/riscv/
H A Dsignal.c49 struct target_sigcontext uc_mcontext QEMU_ALIGNED(16);
/qemu/hw/cxl/
H A Dcxl-mailbox-utils.c1037 } QEMU_PACKED QEMU_ALIGNED(16) *get_log; in cmd_logs_get_log()
1153 } QEMU_PACKED QEMU_ALIGNED(16) CXLSetFeatureInHeader;
1176 } QEMU_PACKED QEMU_ALIGNED(16) CXLMemPatrolScrubSetFeature;
1190 } QEMU_PACKED QEMU_ALIGNED(16) CXLMemECSSetFeature;
1204 } QEMU_PACKED QEMU_ALIGNED(16) * get_feats_in = (void *)payload_in; in cmd_features_get_supported()
1209 } QEMU_PACKED QEMU_ALIGNED(16) * get_feats_out = (void *)payload_out; in cmd_features_get_supported()
1285 } QEMU_PACKED QEMU_ALIGNED(16) * get_feature; in cmd_features_get_feature()
/qemu/util/
H A Dqht.c150 } QEMU_ALIGNED(QHT_BUCKET_ALIGN);
168 } QEMU_ALIGNED(QHT_BUCKET_ALIGN);
/qemu/include/hw/ppc/
H A Dspapr_nested.h514 ppc_vsr_t vsr[64] QEMU_ALIGNED(16);
/qemu/include/hw/core/
H A Dcpu.h580 char neg_align[-sizeof(CPUNegativeOffsetState) % 16] QEMU_ALIGNED(16);
/qemu/target/s390x/
H A Dcpu.h59 uint64_t vregs[32][2] QEMU_ALIGNED(16); /* vector registers */
/qemu/target/arm/
H A Dcpu.h169 uint64_t d[2 * ARM_MAX_VQ] QEMU_ALIGNED(16);
174 uint64_t p[DIV_ROUND_UP(2 * ARM_MAX_VQ, 8)] QEMU_ALIGNED(16);
658 uint32_t qc[4] QEMU_ALIGNED(16);
/qemu/target/riscv/
H A Dcpu.h207 uint64_t vreg[32 * RV_VLEN_MAX / 64] QEMU_ALIGNED(16);
/qemu/linux-user/sparc/
H A Dsignal.c71 uint32_t insns[2] QEMU_ALIGNED(8);
/qemu/target/i386/
H A Dcpu.h1893 ZMMReg xmm_regs[CPU_NB_REGS == 8 ? 8 : 32] QEMU_ALIGNED(16);
1894 ZMMReg xmm_t0 QEMU_ALIGNED(16);
/qemu/target/ppc/
H A Dcpu.h1297 ppc_vsr_t vsr[64] QEMU_ALIGNED(16);
1299 ppc_vsr_t vscr_sat QEMU_ALIGNED(16);