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Searched refs:PRV_S (Results 1 – 8 of 8) sorted by relevance

/qemu/target/riscv/
H A Dpmu.c114 (env->priv == PRV_S && virt_on && in riscv_pmu_incr_ctr_rv32()
118 (env->priv == PRV_S && !virt_on && in riscv_pmu_incr_ctr_rv32()
155 (env->priv == PRV_S && virt_on && in riscv_pmu_incr_ctr_rv64()
159 (env->priv == PRV_S && !virt_on && in riscv_pmu_incr_ctr_rv64()
207 g_assert(env->priv <= PRV_S); in riscv_pmu_icount_update_priv()
216 g_assert(newpriv <= PRV_S); in riscv_pmu_icount_update_priv()
247 g_assert(env->priv <= PRV_S); in riscv_pmu_cycle_update_priv()
256 g_assert(newpriv <= PRV_S); in riscv_pmu_cycle_update_priv()
H A Dop_helper.c153 (((env->priv <= PRV_S) && !get_field(env->henvcfg, envbits)) || in check_zicbo_envcfg()
154 ((env->priv < PRV_S) && !get_field(env->senvcfg, envbits)))) { in check_zicbo_envcfg()
158 if ((env->priv < PRV_S) && !get_field(env->senvcfg, envbits)) { in check_zicbo_envcfg()
279 if (!(env->priv >= PRV_S)) { in helper_sret()
381 (prev_priv == PRV_S || prev_priv == PRV_U))) { in ssdbltrp_mxret()
529 bool prv_s = env->priv == PRV_S; in helper_wfi()
546 if (env->virt_enabled && (env->priv == PRV_S || env->priv == PRV_U) && in helper_wrs_nto()
560 (env->priv == PRV_S && get_field(env->mstatus, MSTATUS_TVM)))) { in helper_tlb_flush()
585 (env->priv == PRV_S && !env->virt_enabled)) { in helper_hyp_tlb_flush()
595 if (env->priv == PRV_S && !env->virt_enabled && in helper_hyp_gvma_tlb_flush()
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H A Dcpu_helper.c60 if (mode == PRV_S && get_field(status, MSTATUS_SUM)) { in riscv_env_mmu_index()
83 case PRV_S: in cpu_get_fcfien()
112 case PRV_S: in cpu_get_bcfien()
155 case PRV_S: in riscv_pm_get_pmm()
491 vsie = (env->priv < PRV_S) || in riscv_cpu_local_irq_pending()
492 (env->priv == PRV_S && get_field(env->mstatus, MSTATUS_SIE)); in riscv_cpu_local_irq_pending()
496 hsie = (env->priv < PRV_S) || in riscv_cpu_local_irq_pending()
497 (env->priv == PRV_S && get_field(env->mstatus, MSTATUS_SIE)); in riscv_cpu_local_irq_pending()
807 case PRV_S: in riscv_ctr_priv_to_mask()
828 case PRV_S: in riscv_ctr_get_control()
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H A Dinternals.h50 ret = PRV_S; in mmuidx_priv()
H A Dcsr.c624 if (env->priv == PRV_S && !env->virt_enabled && in satp()
628 if (env->priv == PRV_S && env->virt_enabled && in satp()
638 if (env->priv == PRV_S && !env->virt_enabled && in hgatp()
821 if (env->priv == PRV_S && (env->mseccfg & MSECCFG_SSEED)) { in seed()
1274 curr_val += counter_arr[PRV_S]; in riscv_pmu_ctr_get_fixed_counters_val()
1282 curr_val += counter_arr_virt[PRV_S]; in riscv_pmu_ctr_get_fixed_counters_val()
1960 case PRV_S: in legalize_mpp()
2647 (env->priv == PRV_S && env->mvien & MIP_SEIP && in rmw_xireg_aia()
2653 priv = PRV_S; in rmw_xireg_aia()
2660 priv = PRV_S; in rmw_xireg_aia()
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H A Dgdbstub.c236 new_priv = PRV_S; in riscv_gdb_set_virtual()
H A Dcpu_bits.h638 #define PRV_S 1 macro
/qemu/hw/intc/
H A Driscv_imsic.c219 if (priv == PRV_S) { in riscv_imsic_rmw()
386 riscv_cpu_set_aia_ireg_rmw_fn(env, (imsic->mmode) ? PRV_M : PRV_S, in riscv_imsic_realize()