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Searched refs:PCI_PM_CTRL_STATE_MASK (Results 1 – 8 of 8) sorted by relevance

/qemu/hw/net/
H A Digb.c371 PCI_PM_CTRL_STATE_MASK | in igb_add_pm_capability()
H A De1000e.c387 PCI_PM_CTRL_STATE_MASK | in e1000e_add_pm_capability()
/qemu/include/standard-headers/linux/
H A Dpci_regs.h255 #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ macro
/qemu/hw/virtio/
H A Dvirtio-pci.c2258 PCI_PM_CTRL_STATE_MASK); in virtio_pci_realize()
2338 (pmcsr & PCI_PM_CTRL_STATE_MASK) == 3; in virtio_pci_no_soft_reset()
2361 PCI_PM_CTRL_STATE_MASK); in virtio_pci_bus_reset_hold()
/qemu/hw/vfio/
H A Dpci.c2268 pci_set_word(pdev->wmask + pos + PCI_PM_CTRL, PCI_PM_CTRL_STATE_MASK); in vfio_add_std_cap()
2472 state = pmcsr & PCI_PM_CTRL_STATE_MASK; in vfio_pci_pre_reset()
2474 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; in vfio_pci_pre_reset()
2478 state = pmcsr & PCI_PM_CTRL_STATE_MASK; in vfio_pci_pre_reset()
/qemu/hw/pci/
H A Dpci.c468 return pmcsr & PCI_PM_CTRL_STATE_MASK; in pci_pm_state()
502 PCI_PM_CTRL_STATE_MASK); in pci_pm_update()
558 PCI_PM_CTRL_STATE_MASK); in pci_do_device_reset()
/qemu/tests/qtest/
H A Dahci-test.c470 ASSERT_BIT_CLEAR(dataw, PCI_PM_CTRL_STATE_MASK); in ahci_test_pmcap()
/qemu/hw/nvme/
H A Dctrl.c8618 PCI_PM_CTRL_STATE_MASK); in nvme_add_pm_capability()