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Searched refs:PCI_CACHE_LINE_SIZE (Results 1 – 14 of 14) sorted by relevance

/qemu/hw/pci-host/
H A Duninorth.c279 d->config[PCI_CACHE_LINE_SIZE] = 0x08; in unin_main_pci_host_realize()
296 d->config[PCI_CACHE_LINE_SIZE] = 0x08; in unin_agp_pci_host_realize()
303 d->config[PCI_CACHE_LINE_SIZE] = 0x08; in u3_agp_pci_host_realize()
309 d->config[PCI_CACHE_LINE_SIZE] = 0x08; in unin_internal_pci_host_realize()
H A Draven.c345 d->config[PCI_CACHE_LINE_SIZE] = 0x08; in raven_realize()
/qemu/hw/ide/
H A Dich.c135 dev->config[PCI_CACHE_LINE_SIZE] = 0x08; /* Cache line size */ in pci_ich9_ahci_realize()
H A Dsii3112.c259 pci_set_byte(dev->config + PCI_CACHE_LINE_SIZE, 8); in sii3112_pci_realize()
/qemu/hw/usb/
H A Dhcd-xhci-pci.c131 dev->config[PCI_CACHE_LINE_SIZE] = 0x10; in usb_xhci_pci_realize()
/qemu/hw/net/
H A Digb.c391 pci_dev->config[PCI_CACHE_LINE_SIZE] = 0x10; in igb_pci_realize()
H A De1000e.c424 pci_dev->config[PCI_CACHE_LINE_SIZE] = 0x10; in e1000e_pci_realize()
H A De1000.c1638 pci_conf[PCI_CACHE_LINE_SIZE] = 0x10; in pci_e1000_realize()
/qemu/include/standard-headers/linux/
H A Dpci_regs.h76 #define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */ macro
/qemu/hw/display/
H A Dvmware_vga.c1317 dev->config[PCI_CACHE_LINE_SIZE] = 0x08; in pci_vmsvga_realize()
/qemu/hw/pci/
H A Dpci.c554 dev->config[PCI_CACHE_LINE_SIZE] = 0x0; in pci_do_device_reset()
1025 dev->wmask[PCI_CACHE_LINE_SIZE] = 0xff; in pci_init_wmask()
/qemu/tests/qtest/
H A Dahci-test.c303 datab = qpci_config_readb(ahci->dev, PCI_CACHE_LINE_SIZE); in ahci_test_pci_spec()
/qemu/hw/xen/
H A Dxen_pt_config_init.c657 .offset = PCI_CACHE_LINE_SIZE,
/qemu/hw/ppc/
H A Dspapr_pci.c1369 pci_default_read_config(dev, PCI_CACHE_LINE_SIZE, 1); in spapr_dt_pci_device()