Searched refs:OPC_SUB (Results 1 – 4 of 4) sorted by relevance
/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 202 OPC_SUB = 0x40000033, 1330 tcg_out_opc_reg(s, OPC_SUB, ret, TCG_REG_ZERO, tmp); 2373 RISCVInsn insn = type == TCG_TYPE_I32 ? OPC_SUBW : OPC_SUB;
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/qemu/target/mips/tcg/ |
H A D | translate.c | 215 OPC_SUB = 0x22 | OPC_SPECIAL, enumerator 2540 if (rd == 0 && opc != OPC_ADD && opc != OPC_SUB in gen_arith() 2583 case OPC_SUB: in gen_arith() 13242 case OPC_SUB: in decode_opc_special()
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H A D | micromips_translate.c.inc | 1684 mips32_op = OPC_SUB;
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H A D | nanomips_translate.c.inc | 1299 gen_arith(ctx, OPC_SUB, rd, rs, rt);
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