Searched refs:OPC_SLTU (Results 1 – 7 of 7) sorted by relevance
/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 308 OPC_SLTU = OPC_SPECIAL | 053, 799 tcg_out_opc_reg(s, OPC_SLTU, ret, arg1, arg2); 805 tcg_out_opc_reg(s, OPC_SLTU, ret, arg2, arg1); 825 tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, tmp); 857 tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, tmp);
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/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 197 OPC_SLTU = 0x3033, 1240 tcg_out_opc_reg(s, OPC_SLTU, ret, arg1, arg2); 1266 tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, tmp); 1322 tcg_out_opc_reg(s, OPC_SLTU, ret, TCG_REG_ZERO, tmp);
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/qemu/target/mips/tcg/ |
H A D | mips16e_translate.c.inc | 967 gen_slt(ctx, OPC_SLTU, 24, rx, ry);
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H A D | micromips_translate.c.inc | 1730 mips32_op = OPC_SLTU;
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H A D | translate.c | 222 OPC_SLTU = 0x2B | OPC_SPECIAL, enumerator 2802 case OPC_SLTU: in gen_slt() 13267 case OPC_SLTU: in decode_opc_special()
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H A D | nanomips_translate.c.inc | 1352 gen_slt(ctx, OPC_SLTU, rd, rs, rt);
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/qemu/tcg/loongarch64/ |
H A D | tcg-insn-defs.c.inc | 28 OPC_SLTU = 0x00128000, 1434 tcg_out32(s, encode_djk_insn(OPC_SLTU, d, j, k));
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