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Searched refs:OPC_SLLV (Results 1 – 5 of 5) sorted by relevance

/qemu/target/mips/tcg/
H A Dmips16e_translate.c.inc973 gen_shift(ctx, OPC_SLLV, ry, rx, ry);
H A Dmicromips_translate.c.inc1697 mips32_op = OPC_SLLV;
H A Dtranslate.c186 OPC_SLLV = 0x04 | OPC_SPECIAL, enumerator
2827 case OPC_SLLV: in gen_shift()
13246 case OPC_SLLV: /* Shifts */ in decode_opc_special()
H A Dnanomips_translate.c.inc1280 gen_shift(ctx, OPC_SLLV, rd, rt, rs);
/qemu/tcg/mips/
H A Dtcg-target.c.inc262 OPC_SLLV = OPC_SPECIAL | 004,
2098 MIPSInsn insn = type == TCG_TYPE_I32 ? OPC_SLLV : OPC_DSLLV;