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Searched refs:OPC_ADD (Results 1 – 4 of 4) sorted by relevance

/qemu/tcg/riscv/
H A Dtcg-target.c.inc157 OPC_ADD = 0x33,
942 tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP2, TCG_REG_TMP2, addr);
981 tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP0, TCG_REG_TMP0, addr);
1711 tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1);
1747 tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP0, addr_reg, TCG_REG_TMP2);
1753 tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP0,
1779 tcg_out_opc_reg(s, OPC_ADD, base, addr_reg,
1786 tcg_out_opc_reg(s, OPC_ADD, base, base, TCG_GUEST_BASE_REG);
1962 RISCVInsn insn = type == TCG_TYPE_I32 ? OPC_ADDW : OPC_ADD;
/qemu/target/mips/tcg/
H A Dtranslate.c213 OPC_ADD = 0x20 | OPC_SPECIAL, enumerator
2540 if (rd == 0 && opc != OPC_ADD && opc != OPC_SUB in gen_arith()
2550 case OPC_ADD: in gen_arith()
13240 case OPC_ADD: in decode_opc_special()
H A Dmicromips_translate.c.inc1678 mips32_op = OPC_ADD;
H A Dnanomips_translate.c.inc1292 gen_arith(ctx, OPC_ADD, rd, rs, rt);