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Searched refs:ISA_MIPS3 (Results 1 – 9 of 9) sorted by relevance

/qemu/target/mips/tcg/
H A Dmips16e_translate.c.inc399 check_insn(ctx, ISA_MIPS3);
405 check_insn(ctx, ISA_MIPS3);
411 check_insn(ctx, ISA_MIPS3);
417 check_insn(ctx, ISA_MIPS3);
423 check_insn(ctx, ISA_MIPS3);
433 check_insn(ctx, ISA_MIPS3);
439 check_insn(ctx, ISA_MIPS3);
445 check_insn(ctx, ISA_MIPS3);
516 check_insn(ctx, ISA_MIPS3);
595 check_insn(ctx, ISA_MIPS3);
[all …]
H A Dmicromips_translate.c.inc1841 check_insn(ctx, ISA_MIPS3);
1852 check_insn(ctx, ISA_MIPS3);
2530 check_insn(ctx, ISA_MIPS3);
2536 check_insn(ctx, ISA_MIPS3);
2542 check_insn(ctx, ISA_MIPS3);
2548 check_insn(ctx, ISA_MIPS3);
2554 check_insn(ctx, ISA_MIPS3);
2559 check_insn(ctx, ISA_MIPS3);
2578 check_insn(ctx, ISA_MIPS3);
2943 check_insn(ctx, ISA_MIPS3);
[all …]
H A Dtranslate.c5633 check_insn(ctx, ISA_MIPS3); in gen_mfc0()
6367 check_insn(ctx, ISA_MIPS3); in gen_mtc0()
7108 check_insn(ctx, ISA_MIPS3); in gen_dmfc0()
7827 check_insn(ctx, ISA_MIPS3); in gen_dmtc0()
8515 check_insn(ctx, ISA_MIPS3); in gen_cp0()
8524 check_insn(ctx, ISA_MIPS3); in gen_cp0()
8651 check_insn(ctx, ISA_MIPS3 | ISA_MIPS_R1); in gen_cp0()
13174 check_insn(ctx, ISA_MIPS3); in decode_opc_special_legacy()
13314 check_insn(ctx, ISA_MIPS3); in decode_opc_special()
13327 check_insn(ctx, ISA_MIPS3); in decode_opc_special()
[all …]
/qemu/target/mips/
H A Dmips-defs.h16 #define ISA_MIPS3 0x0000000000000004ULL /* 64-bit */ macro
59 #define CPU_MIPS3 (CPU_MIPS2 | ISA_MIPS3)
63 #define CPU_MIPS64 (ISA_MIPS3)
H A Dinternal.h317 if ((env->insn_flags & ISA_MIPS3) && in compute_hflags()
324 if (!(env->insn_flags & ISA_MIPS3)) { in compute_hflags()
H A Dcpu.c226 if (env->cpu_model->insn_flags & ISA_MIPS3) { in mips_cpu_reset_hold()
/qemu/hw/mips/
H A Dbootloader.c123 if (bootcpu_supports_isa(ISA_MIPS3)) { in bl_gen_dsll()
208 if (bootcpu_supports_isa(ISA_MIPS3)) { in bl_gen_sd()
238 if (bootcpu_supports_isa(ISA_MIPS3)) { in bl_gen_load_ulong()
284 if (bootcpu_supports_isa(ISA_MIPS3)) { in bl_gen_write_ulong()
/qemu/target/mips/tcg/system/
H A Dtlb_helper.c1087 if (env->insn_flags & ISA_MIPS3) { in mips_cpu_do_interrupt()
1116 if (env->insn_flags & ISA_MIPS3) { in mips_cpu_do_interrupt()
1302 if (env->insn_flags & ISA_MIPS3) { in mips_cpu_do_interrupt()
/qemu/disas/
H A Dmips.c620 #define ISA_MIPS3 (ISA_MIPS2 | INSN_ISA3) macro
621 #define ISA_MIPS4 (ISA_MIPS3 | INSN_ISA4)
3898 { "r4000", 1, bfd_mach_mips4000, CPU_R4000, ISA_MIPS3,
3902 { "vr4100", 1, bfd_mach_mips4100, CPU_VR4100, ISA_MIPS3,
3904 { "vr4111", 1, bfd_mach_mips4111, CPU_R4111, ISA_MIPS3,
3906 { "vr4120", 1, bfd_mach_mips4120, CPU_VR4120, ISA_MIPS3,
3908 { "r4300", 1, bfd_mach_mips4300, CPU_R4300, ISA_MIPS3,
3910 { "r4400", 1, bfd_mach_mips4400, CPU_R4400, ISA_MIPS3,
3912 { "r4600", 1, bfd_mach_mips4600, CPU_R4600, ISA_MIPS3,
3914 { "r4650", 1, bfd_mach_mips4650, CPU_R4650, ISA_MIPS3,
[all …]