Searched refs:INT_STATUS (Results 1 – 3 of 3) sorted by relevance
/qemu/hw/dma/ |
H A D | xlnx_csu_dma.c | 59 REG32(INT_STATUS, 0x14) 60 FIELD(INT_STATUS, FIFO_OVERFLOW, 7, 1) /* wtc */ 61 FIELD(INT_STATUS, INVALID_APB, 6, 1) /* wtc */ 62 FIELD(INT_STATUS, THRESH_HIT, 5, 1) /* wtc */ 63 FIELD(INT_STATUS, TIMEOUT_MEM, 4, 1) /* wtc */ 64 FIELD(INT_STATUS, TIMEOUT_STRM, 3, 1) /* wtc */ 65 FIELD(INT_STATUS, AXI_BRESP_ERR, 2, 1) /* wtc, SRC: AXI_RDERR */ 66 FIELD(INT_STATUS, DONE, 1, 1) /* wtc */ 67 FIELD(INT_STATUS, MEM_DONE, 0, 1) /* wtc */
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/qemu/rust/hw/timer/hpet/src/ |
H A D | device.rs | 125 INT_STATUS = 0x20, enumerator 805 Global(INT_STATUS) => self.int_status.get(), in read() 832 Global(INT_STATUS) => self.set_int_status_reg(shift, len, value), in write()
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/qemu/hw/gpio/ |
H A D | aspeed_gpio.c | 222 FIELD(GPIO_INDEX_REG, INT_STATUS, 24, 1) 739 if (FIELD_EX32(data, GPIO_INDEX_REG, INT_STATUS)) { in aspeed_gpio_write_index_mode()
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