Home
last modified time | relevance | path

Searched refs:CSR_VSCAUSE (Results 1 – 3 of 3) sorted by relevance

/qemu/target/riscv/
H A Dcpu_bits.h297 #define CSR_VSCAUSE 0x242 macro
H A Dcpu.c555 CSR_VSCAUSE, in riscv_cpu_dump_state()
H A Dcsr.c6051 [CSR_VSCAUSE] = { "vscause", hmode, read_vscause, write_vscause,