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Searched refs:CSR_MTVAL2 (Results 1 – 3 of 3) sorted by relevance

/qemu/target/riscv/
H A Dcpu_bits.h307 #define CSR_MTVAL2 0x34b macro
H A Dcpu.c559 CSR_MTVAL2, in riscv_cpu_dump_state()
H A Dcsr.c6058 [CSR_MTVAL2] = { "mtval2", dbltrp_hmode, read_mtval2, write_mtval2,