Home
last modified time | relevance | path

Searched refs:CSR_HSTATEEN0 (Results 1 – 2 of 2) sorted by relevance

/qemu/target/riscv/
H A Dcpu_bits.h282 #define CSR_HSTATEEN0 0x60C macro
H A Dcsr.c528 return hstateen_pred(env, csrno, CSR_HSTATEEN0); in hstateen()
3490 int index = csrno - CSR_HSTATEEN0; in read_hstateen()
3500 int index = csrno - CSR_HSTATEEN0; in write_hstateen()
5900 [CSR_HSTATEEN0] = { "hstateen0", hstateen, read_hstateen, write_hstateen0,