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Searched refs:CPUTLBEntryFull (Results 1 – 16 of 16) sorted by relevance

/qemu/accel/tcg/
H A Dcputlb.c257 desc->fulltlb = g_try_new(CPUTLBEntryFull, new_size); in tlb_mmu_resize_locked()
277 desc->fulltlb = g_try_new(CPUTLBEntryFull, new_size); in tlb_mmu_resize_locked()
309 desc->fulltlb = g_new(CPUTLBEntryFull, n_entries); in tlb_mmu_init()
890 static void tlb_reset_dirty_range_locked(CPUTLBEntryFull *full, CPUTLBEntry *ent, in tlb_reset_dirty_range_locked()
999 static inline void tlb_set_compare(CPUTLBEntryFull *full, CPUTLBEntry *ent, in tlb_set_compare()
1026 vaddr addr, CPUTLBEntryFull *full) in tlb_set_page_full()
1191 CPUTLBEntryFull full = { in tlb_set_page_with_attrs()
1244 CPUTLBEntryFull full; in tlb_fill_align()
1291 static void io_failed(CPUState *cpu, CPUTLBEntryFull *full, vaddr addr, in io_failed()
1327 CPUTLBEntryFull *f1 = &cpu->neg.tlb.d[mmu_idx].fulltlb[index]; in victim_tlb_hit()
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/qemu/include/accel/tcg/
H A Dprobe.h88 CPUTLBEntryFull **pfull, uintptr_t retaddr);
102 void **phost, CPUTLBEntryFull **pfull);
H A Dcpu-ops.h212 bool (*tlb_fill_align)(CPUState *cpu, CPUTLBEntryFull *out, vaddr addr,
/qemu/target/sparc/
H A Dmmu_helper.c72 static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full, in get_physical_address()
215 CPUTLBEntryFull full = {}; in sparc_cpu_tlb_fill()
548 static int get_physical_address_data(CPUSPARCState *env, CPUTLBEntryFull *full, in get_physical_address_data()
648 static int get_physical_address_code(CPUSPARCState *env, CPUTLBEntryFull *full, in get_physical_address_code()
724 static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full, in get_physical_address()
766 CPUTLBEntryFull full = {}; in sparc_cpu_tlb_fill()
878 CPUTLBEntryFull full = {}; in cpu_sparc_get_phys_page()
/qemu/include/qemu/
H A Dtypedefs.h44 typedef struct CPUTLBEntryFull CPUTLBEntryFull; typedef
/qemu/include/hw/core/
H A Dcpu.h214 struct CPUTLBEntryFull { struct
294 CPUTLBEntryFull vfulltlb[CPU_VTLB_SIZE];
295 CPUTLBEntryFull *fulltlb;
/qemu/include/exec/
H A Dcputlb.h58 CPUTLBEntryFull *full);
/qemu/target/hppa/
H A Dcpu.h372 bool hppa_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, vaddr addr,
H A Dmem_helper.c430 bool hppa_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, vaddr addr, in hppa_cpu_tlb_fill_align()
/qemu/target/arm/tcg/
H A Dtlb_helper.c321 bool arm_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, vaddr address, in arm_cpu_tlb_fill_align()
H A Dmte_helper.c92 CPUTLBEntryFull *full; in allocation_tag_mem_probe()
H A Dhelper-a64.c1742 CPUTLBEntryFull *full; in is_guarded_page()
H A Dsve_helper.c5568 CPUTLBEntryFull *full; in sve_probe_page()
/qemu/target/arm/
H A Dinternals.h947 bool arm_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, vaddr addr,
1558 CPUTLBEntryFull f;
H A Dptw.c598 CPUTLBEntryFull *full; in S1_ptw_translate()
/qemu/target/i386/tcg/system/
H A Dexcp_helper.c448 CPUTLBEntryFull *full; in mmu_translate()