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Searched refs:ADD (Results 1 – 23 of 23) sorted by relevance

/qemu/accel/tcg/
H A Datomic_template.h314 #define ADD(X, Y) (X + Y) macro
315 GEN_ATOMIC_HELPER_FN(fetch_add, ADD, DATA_TYPE, old)
316 GEN_ATOMIC_HELPER_FN(add_fetch, ADD, DATA_TYPE, new)
317 #undef ADD
/qemu/target/rx/
H A Dinsns.decode99 # ADD #uimm4, rd
101 # ADD #imm, rs, rd
103 # ADD dsp[rs].ub, rd
104 # ADD rs, rd
106 # ADD dsp[rs], rd
108 # ADD rs, rs2, rd
/qemu/target/s390x/tcg/
H A Dinsn-data.h.inc25 /* ADD */
40 /* ADD HIGH */
43 /* ADD IMMEDIATE */
50 /* ADD IMMEDIATE HIGH */
52 /* ADD HALFWORD */
56 /* ADD HALFWORD IMMEDIATE */
60 /* ADD LOGICAL */
70 /* ADD LOGICAL HIGH */
73 /* ADD LOGICAL IMMEDIATE */
76 /* ADD LOGICAL WITH SIGNED IMMEDIATE */
[all …]
/qemu/tests/docker/dockerfiles/
H A Ddebian-bootstrap.docker9 ADD . /
H A Ddebian-toolchain.docker30 ADD build-toolchain.sh /root/build-toolchain.sh
/qemu/docs/specs/
H A Drocker.rst711 OF_DPA_CMD 2 CMD_[ADD|MOD]
923 -ROCKER_EEXIST ADD entry already exists
924 -ROCKER_ENOSPC ADD no space left in flow table
943 FLOW_GROUP_CMD 2 CMD_[ADD|MOD]
1002 -ROCKER_EINVAL ADD|MOD invalid parameters passed in
1003 -ROCKER_EEXIST ADD entry already exists
1004 -ROCKER_ENOSPC ADD no space left in flow table
1007 -ROCKER_ENODEV ADD next group ID doesn't exist
/qemu/target/avr/
H A Dinsn.decode53 ADD 0000 11 . ..... .... @op_rd_rr
H A Ddisas.c140 INSN(ADD, "r%d, r%d", a->rd, a->rr)
/qemu/target/arm/tcg/
H A Dvec_helper.c1683 #define DO_FMUL_IDX(NAME, ADD, MUL, TYPE, H) \ argument
1694 d[i + j] = ADD(d[i + j], MUL(n[i + j], mm, stat), stat); \
2607 #define ADD(A, B) (A + B) macro
2608 DO_3OP_PAIR(gvec_addp_b, ADD, uint8_t, H1)
2609 DO_3OP_PAIR(gvec_addp_h, ADD, uint16_t, H2)
2610 DO_3OP_PAIR(gvec_addp_s, ADD, uint32_t, H4)
2611 DO_3OP_PAIR(gvec_addp_d, ADD, uint64_t, )
2612 #undef ADD
H A Dtranslate.c3862 DO_ANY3(ADD, a->s ? gen_add_CC : tcg_gen_add_i32, false, in DO_CMP2()
4347 #define DO_QADDSUB(NAME, ADD, DOUB) \ argument
4350 return op_qaddsub(s, a, ADD, DOUB); \
/qemu/hw/arm/
H A Dtrace-events64 smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s"
/qemu/tcg/aarch64/
H A Dtcg-target.c.inc1073 tcg_out_insn(s, 3502, ADD, 1, temp, temp, base);
1683 tcg_out_insn(s, 3502, ADD, 1, TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_TMP0);
1864 tcg_out_insn(s, 3501, ADD, TCG_TYPE_I64, base,
1868 tcg_out_insn(s, 3502, ADD, 1, base, h.base, h.index);
2047 tcg_out_insn(s, 3502, ADD, type, a0, a1, a2);
2952 tcg_out_insn(s, 3611, ADD, vece, a0, a1, a2);
2954 tcg_out_insn(s, 3616, ADD, is_q, vece, a0, a1, a2);
/qemu/target/sparc/
H A Dinsns.decode218 ADD 10 ..... 0.0000 ..... . ............. @r_r_ri_cc
H A Dtranslate.c3757 TRANS(ADD, ALL, do_arith, a, tcg_gen_add_tl, tcg_gen_addi_tl, gen_op_addcc) in TRANS() argument
/qemu/tcg/ppc/
H A Dtcg-target.c.inc447 #define ADD XO31(266)
1130 tcg_out_mem_long(s, ADDI, ADD, ret, TCG_REG_TB, tb_diff);
2459 tcg_out32(s, ADD | TAB(TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_TMP2));
2658 tcg_out32(s, ADD | TAB(index, h.base, h.index));
2928 tcg_out32(s, ADD | TAB(a0, a1, a2));
2934 tcg_out_mem_long(s, ADDI, ADD, a0, a1, a2);
/qemu/target/i386/tcg/
H A Ddecode-new.c.inc1578 [0x00] = X86_OP_ENTRY2(ADD, E,b, G,b, lock),
1579 [0x01] = X86_OP_ENTRY2(ADD, E,v, G,v, lock),
1580 [0x02] = X86_OP_ENTRY2(ADD, G,b, E,b, lock),
1581 [0x03] = X86_OP_ENTRY2(ADD, G,v, E,v, lock),
1582 [0x04] = X86_OP_ENTRY2(ADD, 0,b, I,b, lock), /* AL, Ib */
1583 [0x05] = X86_OP_ENTRY2(ADD, 0,v, I,z, lock), /* rAX, Iz */
/qemu/target/mips/tcg/
H A Dmicromips_translate.c.inc167 ADD = 0x4,
1677 case ADD:
2224 FINSN_3ARG_SDPS(ADD);
/qemu/target/ppc/
H A Dinsn32.decode371 ADD 011111 ..... ..... ..... . 100001010 . @XO
/qemu/target/ppc/translate/
H A Dfixedpoint-impl.c.inc405 TRANS(ADD, do_add_XO, false, false);
/qemu/tests/tcg/i386/
H A Dx86.csv209 "ADD AL, imm8","ADDB imm8, AL","addb imm8, AL","04 ib","V","V","","","rw,r","Y","8"
210 "ADD r/m8, imm8","ADDB imm8, r/m8","addb imm8, r/m8","80 /0 ib","V","V","","","rw,r","Y","8"
211 "ADD r/m8, imm8","ADDB imm8, r/m8","addb imm8, r/m8","82 /0 ib","V","N.S.","","","rw,r","Y","8"
212 "ADD r/m8, imm8","ADDB imm8, r/m8","addb imm8, r/m8","REX 80 /0 ib","N.E.","V","","pseudo64","rw,r"…
213 "ADD r8, r/m8","ADDB r/m8, r8","addb r/m8, r8","02 /r","V","V","","","rw,r","Y","8"
214 "ADD r8, r/m8","ADDB r/m8, r8","addb r/m8, r8","REX 02 /r","N.E.","V","","pseudo64","rw,r","Y","8"
215 "ADD r/m8, r8","ADDB r8, r/m8","addb r8, r/m8","00 /r","V","V","","","rw,r","Y","8"
216 "ADD r/m8, r8","ADDB r8, r/m8","addb r8, r/m8","REX 00 /r","N.E.","V","","pseudo64","rw,r","Y","8"
217 "ADD EAX, imm32","ADDL imm32, EAX","addl imm32, EAX","05 id","V","V","","operand32","rw,r","Y","32"
218 "ADD r/m32, imm32","ADDL imm32, r/m32","addl imm32, r/m32","81 /0 id","V","V","","operand32","rw,r"…
[all …]
/qemu/tcg/loongarch64/
H A Dtcg-target.c.inc466 * For bits within that hole, it's more efficient to use LU12I and ADD.
/qemu/tcg/s390x/
H A Dtcg-target.c.inc1443 * ADD LOGICAL WITH CARRY considers (CC & 2) the carry bit.
/qemu/disas/
H A Dnanomips.c1561 static char *ADD(uint64 instruction, Dis_info *info) in ADD() function
16402 0xfc0003ff, 0x20000110, &ADD , 0,