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Searched refs:regVGA_CACHE_CONTROL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h1081 #define regVGA_CACHE_CONTROL_BASE_IDX 1 macro
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H A Ddcn_3_1_2_offset.h1370 #define regVGA_CACHE_CONTROL_BASE_IDX 1 macro
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H A Ddcn_3_1_4_offset.h1233 #define regVGA_CACHE_CONTROL_BASE_IDX 1 macro
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H A Ddcn_3_2_1_offset.h959 #define regVGA_CACHE_CONTROL_BASE_IDX 1 macro
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H A Ddcn_3_1_6_offset.h1578 #define regVGA_CACHE_CONTROL_BASE_IDX 1 macro
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