Home
last modified time | relevance | path

Searched refs:regUVD_RB_SIZE3_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ !
H A Dvcn_2_6_0_offset.h1337 #define regUVD_RB_SIZE3_BASE_IDX 1 macro
H A Dvcn_5_0_0_offset.h201 #define regUVD_RB_SIZE3_BASE_IDX 1 macro
H A Dvcn_4_0_5_offset.h210 #define regUVD_RB_SIZE3_BASE_IDX 1 macro
H A Dvcn_4_0_0_offset.h223 #define regUVD_RB_SIZE3_BASE_IDX 1 macro
H A Dvcn_4_0_3_offset.h223 #define regUVD_RB_SIZE3_BASE_IDX 1 macro