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Searched refs:regRLC_SPARE_INT (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h5182 #define regRLC_SPARE_INT 0x4ccc macro
H A Dgc_9_4_3_offset.h6704 #define regRLC_SPARE_INT 0x4ccc macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c1447 reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regRLC_SPARE_INT); in gfx_v9_4_3_init_rlcg_reg_access_ctrl()