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Searched refs:regPCIE_CONFIG_CNTL (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dnbio_v7_2.c385 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CONFIG_CNTL)); in nbio_v7_2_init_registers()
392 WREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CONFIG_CNTL), data); in nbio_v7_2_init_registers()
/linux/drivers/gpu/drm/amd/include/asic_reg/pcie/
H A Dpcie_6_1_0_offset.h312 #define regPCIE_CONFIG_CNTL 0x20011 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_4_3_0_offset.h6600 #define regPCIE_CONFIG_CNTL 0x28a0011 macro
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H A Dnbio_7_2_0_offset.h19102 #define regPCIE_CONFIG_CNTL global() macro
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