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Searched refs:regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h6810 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_5_0_offset.h12652 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_6_0_offset.h5804 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_2_offset.h7051 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_4_offset.h13718 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_2_1_offset.h5352 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_5_1_offset.h12631 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_4_1_0_offset.h5892 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_6_offset.h7271 #define regMPCC_OGAM2_MPCC_OGAM_RAMA_START_CNTL_R … macro