Home
last modified time | relevance | path

Searched refs:regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h6456 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_5_0_offset.h12298 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_6_0_offset.h5450 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_2_offset.h6697 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_4_offset.h13364 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_2_1_offset.h4998 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_5_1_offset.h12277 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_4_1_0_offset.h5538 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_6_offset.h6917 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_START_SLOPE_CNTL_R … macro