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Searched refs:regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h905 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h11131 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_6_0_offset.h1059 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h1202 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h12235 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h809 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h11110 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h938 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h1406 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_R_BASE_IDX … macro